STM32H747AI datasheet(34/252 Pages) STMICROELECTRONICS

34 / 252 page

Functional overview

STM32H747xI/G

24/242

DS12930 Rev 1

3.12

Nested vectored interrupt controller (NVIC)

Both Cortex®-M7 (CPU1) and Cortex®-M4 (CPU2) cores have their own nested vector

interrupt controller (respectively NVIC1 and NVIC2). Each NVIC instance is able to manage

16 priority levels, and handle up to 150 maskable interrupt channels plus the 16 interrupt

lines of the Cortex®-M7 with FPU core.

•

Closely coupled NVIC gives low-latency interrupt processing

•

Interrupt entry vector table address passed directly to the core

•

Allows early processing of interrupts

•

Processing of late arriving, higher-priority interrupts

•

Support tail chaining

•

Processor context automatically saved on interrupt entry, and restored on interrupt exit

with no instruction overhead

This hardware block provides flexible interrupt management features with minimum interrupt

latency.

3.13

Extended interrupt and event controller (EXTI)

The EXTI controller performs interrupt and event management. In addition, it can wake up

the processors, power domains and/or D3 domain from Stop mode.

The EXTI handles up to 89 independent event/interrupt lines split as 28 configurable events

and 61 direct events (including two interrupt lines for inter-core management).

Configurable events have dedicated pending flags, active edge selection, and software

trigger capable.

Direct events provide interrupts or events from peripherals having a status flag.

3.14

Cyclic redundancy check calculation unit (CRC)

The CRC (cyclic redundancy check) calculation unit is used to get a CRC code using a

programmable polynomial.

Among other applications, CRC-based techniques are used to verify data transmission or

storage integrity. In the scope of the EN/IEC 60335-1 standard, they offer a means of

verifying the Flash memory integrity. The CRC calculation unit helps compute a signature of

the software during runtime, to be compared with a reference signature generated at link-

time and stored at a given memory location.

STM32H747AI 数据表(PDF) 34 Page - STMicroelectronics

STM32H747AI 数据表(HTML) 34 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载