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STM32H747AI 数据表(PDF) 209 Page - STMicroelectronics |
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STM32H747AI 数据表(HTML) 209 Page - STMicroelectronics |
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209 / 252 page ![]() DS12930 Rev 1 199/242 STM32H747xI/G Electrical characteristics 221 6.3.32 Camera interface (DCMI) timing specifications Unless otherwise specified, the parameters given in Table 113 for DCMI are derived from tests performed under the ambient temperature, fHCLK frequency and VDD supply voltage summarized in Table 22: General operating conditions, with the following configuration: • DCMI_PIXCLK polarity: falling • DCMI_VSYNC and DCMI_HSYNC polarity: high • Data formats: 14 bits • Capacitive load CL=30 pF • Measurement points are done at CMOS levels: 0.5VDD • VOS level set to VOS1 Figure 50. DCMI timing diagram Table 113. DCMI characteristics(1) Symbol Parameter Min Max Unit - Frequency ratio DCMI_PIXCLK/fHCLK -0.4 - DCMI_PIXCLK Pixel Clock input - 80 MHz Dpixel Pixel Clock input duty cycle 30 70 % tsu(DATA) Data input setup time 3 - - th(DATA) Data hold time 1 - tsu(HSYNC), tsu(VSYNC) DCMI_HSYNC/ DCMI_VSYNC input setup time 2 - ns th(HSYNC), th(VSYNC) DCMI_HSYNC/ DCMI_VSYNC input hold time 1 - - 1. Guaranteed by characterization results. MS32414V2 DCMI_PIXCLK tsu(VSYNC) tsu(HSYNC) DCMI_HSYNC DCMI_VSYNC DATA[0:13] 1/DCMI_PIXCLK th(HSYNC) th(HSYNC) tsu(DATA) th(DATA) |
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