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STM32H747AI 数据表(PDF) 217 Page - STMicroelectronics |
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STM32H747AI 数据表(HTML) 217 Page - STMicroelectronics |
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217 / 252 page  DS12930 Rev 1 207/242 STM32H747xI/G Electrical characteristics 221 Figure 55. SPI timing diagram - slave mode and CPHA = 0 tsu(MI) Data input setup time Master mode 1 - - ns tsu(SI) Slave mode 1 - - th(MI) Data input hold time Master mode 4 - - th(SI) Slave mode 2 - - ta(SO) Data output access time Slave mode 9 13 27 tdis(SO) Data output disable time Slave mode 0 1 5 tv(SO) Data output valid time Slave mode 2.7<VDD<3.6 V -12.5 16 Slave mode 1.62<VDD<3.6 V -12.5 17 tv(MO) Master mode - 1 3 th(SO) Data output hold time Slave mode 1.62<VDD<3.6 V 10 - - th(MO) Master mode 0 - - 1. Guaranteed by characterization results. Table 119. SPI characteristics(1) (continued) Symbol Parameter Conditions Min Typ Max Unit MSv41658V1 NSS input CPHA=0 CPOL=0 CPHA=0 CPOL=1 MISO output MOSI input tsu(SI) th(SI) tw(SCKL) tw(SCKH) tc(SCK) tr(SCK) th(NSS) tdis(SO) tsu(NSS) ta(SO) tv(SO) Next bits IN Last bit OUT First bit IN First bit OUT Next bits OUT th(SO) tf(SCK) Last bit IN |
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