H8SLASH3002 datasheet(4/700 Pages) RENESAS

4 / 700 page

Preface

The H8/3002 is a high-performance single-chip microcontroller that integrates system supporting

functions together with an H8/300H CPU core.

The H8/300H CPU has a 32-bit internal architecture with sixteen 16-bit general registers, and a

concise, optimized instruction set designed for speed. It can address a 16-Mbyte linear address

space.

The on-chip system supporting functions include RAM, a 16-bit integrated timer unit (ITU), a

programmable timing pattern controller (TPC), a watchdog timer (WDT), two serial

communication interfaces (SCI), an A/D converter, I/O ports, a direct memory access controller

(DMAC), a refresh controller, and other facilities.

The address space is divided into eight areas. The data bus width and access cycle length can be

selected independently in each area, simplifying the connection of different types of memory. Four

operating modes (modes 1 to 4) are provided, offering a choice of initial data bus width and

address space size.

With these features, the H8/3002 can be used to implement compact, high-performance systems

easily.

This manual describes the H8/3002 hardware. For details of the instruction set, refer to the

H8/300H Series Programming Manual.

H8/3002 数据表(PDF) 4 Page - Renesas Technology Corp