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H8/3002 数据表(PDF) 6 Page - Renesas Technology Corp |
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H8/3002 数据表(HTML) 6 Page - Renesas Technology Corp |
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6 / 700 page ![]() 2.9 Basic Operational Timing ............................................................................................... 53 2.9.1 Overview......................................................................................................... 53 2.9.2 On-Chip Memory Access Timing................................................................... 53 2.9.3 On-Chip Supporting Module Access Timing ................................................. 55 2.9.4 Access to External Address Space.................................................................. 56 Section 3 MCU Operating Modes........................................................................... 57 3.1 Overview ........................................................................................................................ 57 3.1.1 Operating Mode Selection .............................................................................. 57 3.1.2 Register Configuration.................................................................................... 58 3.2 Mode Control Register (MDCR) .................................................................................... 59 3.3 System Control Register (SYSCR)................................................................................. 60 3.4 Operating Mode Descriptions......................................................................................... 62 3.4.1 Mode 1 ............................................................................................................ 62 3.4.2 Mode 2 ............................................................................................................ 62 3.4.3 Mode 3 ............................................................................................................ 62 3.4.4 Mode 4 ............................................................................................................ 62 3.5 Pin Functions in Each Operating Mode.......................................................................... 63 3.6 Memory Map in Each Operating Mode.......................................................................... 63 Section 4 Exception Handling.................................................................................. 65 4.1 Overview ........................................................................................................................ 65 4.1.1 Exception Handling Types and Priority.......................................................... 65 4.1.2 Exception Handling Operation ....................................................................... 65 4.1.3 Exception Vector Table................................................................................... 66 4.2 Reset ........................................................................................................................67 4.2.1 Overview......................................................................................................... 67 4.2.2 Reset Sequence ............................................................................................... 67 4.2.3 Interrupts after Reset....................................................................................... 69 4.3 Interrupts ........................................................................................................................ 70 4.4 Trap Instruction............................................................................................................... 71 4.5 Stack Status after Exception Handling ........................................................................... 71 4.6 Notes on Stack Usage ..................................................................................................... 72 Section 5 Interrupt Controller................................................................................... 73 5.1 Overview ........................................................................................................................ 73 5.1.1 Features........................................................................................................... 73 5.1.2 Block Diagram................................................................................................ 74 5.1.3 Pin Configuration............................................................................................ 75 5.1.4 Register Configuration.................................................................................... 75 |
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