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VSC8221 数据表(PDF) 21 Page - Microsemi Corporation |
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VSC8221 数据表(HTML) 21 Page - Microsemi Corporation |
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21 / 138 page ![]() VSC8221 Data Sheet VMDS-10106 Revision 4.1 December 2006 21 of 26 26 H9 MDiNT OD Management Data interrupt MDiNT is asserted whenever there is a change in the operating status of the device. This open drain signal indicates a change in the PHY's link operating conditions for which a Station Manager must interrogate to determine further information. See Mii Register 25 and Mii Register 26 for more information. The assertion polarity of MDiNT is determined by the presence of a pull-up or pulldown on the MDiNT pin. if the MDiNT pin is pulled up to VDDiOMiCRO using a 4.7k Ω το 10kΩ resistor, it becomes an active low signal. if the MDiNT pin is pulled down using a 4.7k Ω το 10kΩ resistor, then it becomes an active high signal. Table 9. EEPROM interface Signals 100 TFBGA BALL Signal Name Type Description F9 EECLK/ PLLMODE OZC/iPD EECLK - EEPROM Clock Output. This output is the clock line of the two-wire, MSA compliant, serial EEPROM interface. This pin should be connected to the SCL input pin of the AT24 series of Atmel EEPROMs. Refer to “EEPROM interface,” page 57 for details. PLLMODE - PLL Mode Select input. PLLMODE is sampled during the device power-up sequence or on reset. When PLLMODE is high, the PHY expects a 125MHz clock input as the PHY's reference clock. When low (default), a reference clock of 25MHz is expected at the REFCLK pin from either an external crystal or a clock reference. This pin is internally pulled down with a 100k Ω resistor. G9 EEDAT OZC/iPD EEPROM Serial i/O Data. This bidirectional signal is the data line of the two wire, MSA compliant, serial EEPROM interface. This pin should be connected to the SDA pin of the AT24 series of Atmel EEPROMs. Refer to “EEPROM interface,” page 57 for details. The PHY determines that an external EEPROM is present by monitoring the EEDAT pin at power-up or when RESET is de-asserted. if EEDAT has a 4.7k Ω - 10k Ω external pull-up (to VDDiOMiCRO) resistor, it assumes an EEPROM is present. The EEDAT pin can be left floating or grounded to indicate no EEPROM. Table 8. Serial Management interface Signals (continued) 100 TFBGA BALL Signal Name Type Description |
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