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LTC7802EUFDM 数据表(PDF) 29 Page - Analog Devices |
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LTC7802EUFDM 数据表(HTML) 29 Page - Analog Devices |
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29 / 34 page ![]() LTC7802 29 Rev. 0 For more information www.analog.com 6. Keep the switching nodes (SW1, SW2), top gate nodes (TG1, TG2), and boost nodes (BOOST1, BOOST2) away from sensitive small-signal nodes, especially from the other channel’s voltage and current sensing feedback pins. All of these nodes have very large and fast-moving signals and therefore should be kept on the output side of the LTC7802 and occupy minimum PC trace area. Minimize the inductance of the TG and BG gate drive traces and their respective return paths to the controller IC (SW and GND) by using wide traces and multiple parallel vias. 7. Use a modified star ground technique: a low imped- ance, large copper area central grounding point on the same side of the PC board as the input and output capacitors with tie-ins for the bottom of the INTVCC decoupling capacitor, the bottom of the voltage feed- back resistive divider and the GND pin of the IC. For more detailed layout guidance, see Analog Devices Application Notes AN136 “PCB Layout Considerations for Non-Isolated Switching Power Supplies” and AN139 “Power Supply Layout and EMI”. PC Board Layout Debugging Start with one controller on at a time. It is helpful to use a DC-50MHz current probe to monitor the current in the inductor while testing the circuit. Monitor the output switching node (SW pin) to synchronize the oscilloscope to the internal oscillator and probe the actual output voltage as well. Check for proper performance over the operating voltage and current range expected in the appli- cation. The frequency of operation should be maintained over the input voltage range down to dropout and until the output load drops below the low current operation threshold—typically 25% of the maximum designed cur- rent level in Burst Mode operation. The duty cycle percentage should be maintained from cycle to cycle in a well-designed, low noise PCB imple- mentation. Variation in the duty cycle at a subharmonic rate can suggest noise pickup at the current or voltage sensing inputs or inadequate loop compensation. Overcompensation of the loop can be used to tame a poor PC layout if regulator bandwidth optimization is not required. Only after each controller is checked for its indi- vidual performance should both controllers be turned on at the same time. A particularly difficult region of opera- tion is when one controller channel is nearing its current comparator trip point when the other channel is turning on its top MOSFET. This occurs around 50% duty cycle on either channel due to the phasing of the internal clocks and may cause minor duty cycle jitter. Reduce VIN from its nominal level to verify operation of the regulator in dropout. Check the operation of the undervoltage lockout circuit by further lowering VIN while monitoring the outputs to verify operation. Investigate whether any problems exist only at higher output cur- rents or only at higher input voltages. If problems coincide with high input voltages and low output currents, look for capacitive coupling between the BOOST, SW, TG, and pos- sibly BG connections and the sensitive voltage and current pins. The capacitor placed across the current sensing pins needs to be placed immediately adjacent to the pins of the IC. This capacitor helps to minimize the effects of dif- ferential noise injection due to high frequency capacitive coupling. If problems are encountered with high current output loading at lower input voltages, look for inductive coupling between CIN, the top MOSFET, and the bottom MOSFET components to the sensitive current and voltage sensing traces. In addition, investigate common ground path voltage pickup between these components and the GND pin of the IC. An embarrassing problem, which can be missed in an otherwise properly working switching regulator, results when the current sensing leads are hooked up backwards. The output voltage under this improper hookup will still be maintained but the advantages of current mode control will not be realized. Compensation of the voltage loop will be much more sensitive to component selection. This behavior can be investigated by temporarily shorting out the current sensing resistor—don’t worry, the regulator will still maintain control of the output voltage. APPLICATIONS INFORMATION |
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