LTC7802EUFDM datasheet(19/34 Pages) AD

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LTC7802

Rev. 0

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where δ is the temperature dependency of RDS(ON) (δ ≈

0.005/°C) and RDR is the effective driver resistance at the

MOSFET’s Miller threshold voltage (RDR ≈ 2Ω). VTHMIN is

the typical MOSFET minimum threshold voltage.

Both MOSFETs have I2R losses while the main N-channel

equations include an additional term for transition losses,

which are highest at high input voltages. For VIN < 20V

the high current efficiency generally improves with larger

MOSFETs, while for VIN > 20V the transition losses rap-

idly increase to the point that the use of a higher RDS(ON)

device with lower CMILLER actually provides higher effi-

ciency. The synchronous MOSFET losses are greatest at

high input voltage when the top switch duty factor is low

or during a short-circuit when the synchronous switch is

on close to 100% of the period.

CIN and COUT Selection

The selection of CIN is simplified by the 2-phase archi-

tecture and its impact on the worst-case RMS current

drawn through the input network (battery/fuse/capacitor).

It can be shown that the worst-case capacitor RMS cur-

rent occurs when only one controller is operating. The

controller with the highest VOUT • IOUT product needs to

be used in the equation below to determine the maximum

RMS capacitor current requirement.

Increasing the output current drawn from the other con-

troller will actually decrease the input RMS ripple current

from its maximum value. The out-of-phase technique typ-

ically reduces the input capacitor’s RMS ripple current by

a factor of 30% to 70% when compared to a single-phase

power supply solution.

In continuous mode, the source current of the top

MOSFET is a square wave of duty cycle VOUT/VIN. To pre-

vent large voltage transients, a low ESR capacitor sized

for the maximum RMS current of one channel must be

used. At maximum load current IMAX, the maximum RMS

capacitor current is given by:

CIN Required IRMS ≈

IMAX

VIN

VOUT

(

) VIN − VOUT

(

)

⎡⎣

⎤⎦

1/2

This formula has a maximum at VIN = 2VOUT, where IRMS

= IOUT/2. This simple worst-case condition is commonly

used for design because even significant deviations do

not offer much relief. Note that capacitor manufacturers’

ripple current ratings are often based on only 2000 hours

of life. This makes it advisable to further derate the capac-

itor, or to choose a capacitor rated at a higher temperature

than required. Several capacitors may be paralleled to

meet size or height requirements in the design. Due to

the high operating frequency of the LTC7802, ceramic

capacitors can also be used for CIN. Always consult the

manufacturer if there is any question.

The benefit of the LTC7802 2-phase operation can be

calculated by using this equation for the higher power

controller and then calculating the loss that would have

resulted if both controller channels switched on at the

same time. The total RMS power lost is lower when both

controllers are operating due to the reduced overlap of

current pulses required through the input capacitor’s

ESR. This is why the input capacitor’s requirement cal-

culated above for the worst-case controller is adequate

for the dual controller design. Also, the input protection

fuse resistance, battery resistance, and PC board trace

resistance losses are also reduced due to the reduced

peak currents in a 2-phase system. The overall benefit of

a multiphase design will only be fully realized when the

source impedance of the power supply/battery is included

in the efficiency testing.

The drains of the top MOSFETs should be placed within 1cm

of each other and share a common CIN(s). Separating the

drains and CIN may produce undesirable resonances at VIN.

A small (0.1μF to 1μF) bypass capacitor between the

chip VIN pin and ground, placed close to the LTC7802, is

also suggested. An optional 1Ω to 10Ω resistor placed

between CIN and the VIN pin provides further isolation

from a noisy input supply.

The selection of COUT is driven by the effective series

resistance (ESR). Typically, once the ESR requirement

is satisfied, the capacitance is adequate for filtering. The

output ripple (ΔVOUT) is approximated by:

ΔVOUT ≈ ΔIL ESR +

8fCOUT

⎛

⎝⎜

⎞

⎠⎟

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