AI01030

5V

OUT

CL = 100pF or 5pF

CL includes JIG capacitance

1.9k

Ω

DEVICE

UNDER

TEST

1k

Ω

Figure 4. AC Testing Load Circuit

Input Rise and Fall Times

≤ 5ns

Input Pulse Voltages

0 to 3V

Input and Output Timing Ref. Voltages

1.5V

AC MEASUREMENT CONDITIONS

Note that Output Hi-Z is defined as the point where data

is no longer driven.

Symbol

Parameter

Test Condition

Min

Max

Unit

Input Capacitance

10

pF

(3)

Input / Output Capacitance

10

pF

Notes: 1. Effective capacitance measured with power supply at 5V.

2. Sampled only, not 100% tested.

3. Outputs deselected

Table 4. Capacitance

°C, f = 1 MHz )

Symbol

Parameter

Test Condition

Min

Max

Unit

(1)

Input Leakage Current

0V

±1

µA

(1)

Output Leakage Current

0V

±5

µA

Supply Current

Outputs open

50

mA

Supply Current (Standby) TTL

3mA

Supply Current (Standby) CMOS

3

mA

(2)

Input Low Voltage

–0.3

0.8

V

Input High Voltage

2.2

V

Output Low Voltage

0.4

V

Output Low Voltage (IRQ/FT and

RST)

(3)

0.4

V

Output High Voltage

2.4

V

Notes: 1. Outputs Deselected.

2. Negative spikes of –1V allowed for up to 10ns once per Cycle.

3. The IRQ/FT and RST pins are Open Drain.

4/17

M48T36