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ADRF6780ACPZN-R7 数据表(PDF) 24 Page - Analog Devices |
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ADRF6780ACPZN-R7 数据表(HTML) 24 Page - Analog Devices |
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24 / 35 page ![]() ADRF6780 Data Sheet Rev. D | Page 24 of 35 WIDE FREQUENCY PERFORMANCE Figure 73 and Figure 74 show the typical performance of the ADRF6780 when using values outside of the RF output frequency range. It is important to understand that this performance is typical and not guaranteed. Figure 73 was tested in I/Q mode with an RF output frequency of 1 GHz to 31 GHz. The LO input frequency was switched to LO ×2 doubler mode above 14 GHz. Figure 74 was tested in IF mode with an RF output frequency of 1 GHz to 31 GHz. The LO input frequency was switched to LO ×2 doubler mode above 14 GHz. –65 –55 –45 –35 –25 –15 –5 5 1 6 11 16 21 26 31 RF FREQUENCY (GHz) MAIN TONE SIDEBAND LO FEEDTHROUGH Figure 73. Output Power (POUT) vs. RF Frequency (fRF) in I/Q Mode at the Maximum Gain Setting, BB I/Q Amplitude = −15 dBm –65 –55 –45 –35 –25 –15 –5 5 1 6 11 16 21 26 31 RF FREQUENCY (GHz) MAIN TONE SIDEBAND LO FEEDTHROUGH Figure 74. Output Power (POUT) vs. RF Frequency (fRF) in IF Mode at the Maximum Gain Setting, IF Amplitude = −12 dBm LO Path ×1, ×2 Full Range Figure 75 shows the typical performance of the ADRF6780 when the LO input frequency is used within the full frequency range. It is important to understand that this performance is typical and not guaranteed. Figure 75 was tested with the LO path set to ×1 mode and ×2 mode with a 5.9 GHz to 23.6 GHz frequency range in I/Q mode. It is recommended to switch to LO ×2 doubler mode above 14 GHz to achieve better performance out of the device. –65 –55 –45 –35 –25 –15 –5 5 5 7 9 11 13 15 17 19 21 23 25 RF FREQUENCY (GHz) MAIN TONE (LO ×1) MAIN TONE (LO ×2) SIDEBAND (LO ×1) SIDEBAND (LO ×2) LO FEEDTHROUGH (LO ×1) LO FEEDTHROUGH (LO ×2) Figure 75. LO ×1 Mode and LO ×2 Mode, Output Power (POUT) vs. RF Frequency (fRF) in I/Q Mode at the Maximum Gain Setting, BB I/Q Amplitude = −15 dBm LAYOUT Solder the exposed pad on the underside of the ADRF6780 to a low thermal and electrical impedance ground plane. This pad is typically soldered to an exposed opening in the solder mask on the evaluation board. Connect these ground vias to all other ground layers on the evaluation board to maximize heat dissipation from the device package. Figure 76. Evaluation Board Layout for the ADRF6780 Package |
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