ADRF6780ACPZN-R7 datasheet(29/35 Pages) AD

29 / 35 page

Data Sheet

ADRF6780

Rev. D | Page 29 of 35

ALARM_MASK REGISTER

Address: 0x02, Reset: 0xFFFF, Name: ALARM_MASK

Parity Error Mas k - Enable the Alarm

Output Pin

Too Few Errors Mas k -Enable the

Alarm Output Pin

Addres s Range Error Mas k - Enable

the Alarm Output Pin

Too Many Errors Mas k - Enable the

Alarm Output Pin

[15] PARITY_ERROR_MASK (R/W)

[11:0] RESERVED

[14] TOO_FEW_ERRORS_MASK (R/W)

[12] ADDRESS_RANGE_ERROR_MASK (R/W)

[13] TOO_MANY_ERRORS_MASK (R/W)

Table 10. Bit Descriptions for ALARM_MASK

Bits

Bit Name

Settings

Description

Reset

Access

PARITY_ERROR_MASK

Parity Error Mask—Enable the Alarm Output Pin

0x1

R/W

TOO_FEW_ERRORS_MASK

Too Few Errors Mask—Enable the Alarm Output Pin

0x1

R/W

TOO_MANY_ERRORS_MASK

Too Many Errors Mask—Enable the Alarm Output Pin

0x1

R/W

ADDRESS_RANGE_ERROR_MASK

Address Range Error Mask—Enable the Alarm Output Pin

0x1

R/W

[11:0]

RESERVED

Reserved

0xFFF

R/W

ENABLE REGISTER

Address: 0x03, Reset: 0x0157, Name: Enable

UC Bias Enable

VGA Buffer Enable

LO Enable

Detector Enable

LO x1 Enable

LO Buffer Enable

LO x2 Enable

IF Mode Enable

IQ Mode Enable

[15:9] RESERVED

[0] UC_BIAS_ENABLE (R/W)

[8] VGA_BUFFER_ENABLE (R/W)

[1] LO_ENABLE (R/W)

[7] DETECTOR_ENABLE (R/W)

[2] LO_PPF_ENABLE (R/W)

[6] LO_BUFFER_ENABLE (R/W)

[3] LO_X2_ENABLE (R/W)

[5] IF_MODE_ENABLE (R/W)

[4] IQ_MODE_ENABLE (R/W)

Table 11. Bit Descriptions for Enable

Bits

Bit Name

Settings

Description

Reset

Access

[15:9]

RESERVED

Reserved

0x0

R/W

VGA_BUFFER_ENABLE

VGA Buffer Enable

0x1

R/W

DETECTOR_ENABLE

Detector Enable

0x0

R/W

LO_BUFFER_ENABLE

LO Buffer Enable

0x1

R/W

IF_MODE_ENABLE

IF Mode Enable

0x0

R/W

IQ_MODE_ENABLE

IQ Mode Enable

0x1

R/W

LO_X2_ENABLE

LO ×2 Enable

0x0

R/W

LO_PPF_ENABLE

LO ×1 Enable

0x1

R/W

LO_ENABLE

LO Enable

0x1

R/W

UC_BIAS_ENABLE

UC Bias Enable

0x1

R/W

ADRF6780ACPZN-R7 数据表(PDF) 29 Page - Analog Devices

ADRF6780ACPZN-R7 数据表(HTML) 29 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35

数据表下载