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ADRF6780ACPZN-R7 数据表(PDF) 27 Page - Analog Devices |
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ADRF6780ACPZN-R7 数据表(HTML) 27 Page - Analog Devices |
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27 / 35 page ![]() Data Sheet ADRF6780 Rev. D | Page 27 of 35 REGISTER SUMMARY Table 7. Register Summary Hex Addr Name Bits Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reset R/W 0x00 Control [15:8] PARITY_EN SOFT_RESET RESERVED CHIP_ID[7:4] 0x0075 R/W [7:0] CHIP_ID[3:0] CHIP_REVISION 0x01 ALARM_ READBACK [15:8] PARITY_ ERROR TOO_FEW_ ERRORS TOO_MANY_ ERRORS ADDRESS_ RANGE_ ERROR RESERVED 0x0000 R [7:0] RESERVED 0x02 ALARM_MASK [15:8] PARITY_ ERROR_ MASK TOO_FEW_ ERRORS_ MASK TOO_MANY_ ERRORS_ MASK ADDRESS_ RANGE_ ERROR_MASK RESERVED 0xFFFF R/W [7:0] RESERVED 0x03 Enable [15:8] RESERVED VGA_BUFFER_ ENABLE 0x0157 R/W [7:0] DETECTOR_ ENABLE LO_BUFFER_ ENABLE IF_MODE_ ENABLE IQ_MODE_ ENABLE LO_X2_ ENABLE LO_PPF_ ENABLE LO_ ENABLE UC_BIAS_ ENABLE 0x04 Linearize [15:8] RESERVED 0x0080 R/W [7:0] RDAC_LINEARIZE 0x05 LO_PATH [15:8] RESERVED LO_ SIDEBAND RESERVED 0x0000 R/W [7:0] Q_PATH_PHASE_ACCURACY I_PATH_PHASE_ACCURACY 0x06 ADC_ CONTROL [15:8] RESERVED 0x0000 R/W [7:0] RESERVED VDET_ OUTPUT_ SELECT ADC_ START ADC_ ENABLE ADC_CLOCK_ ENABLE 0x0C ADC_OUTPUT [15:8] RESERVED ADC_STATUS 0x0010 R [7:0] ADC_VALUE |
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