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MCP3564 数据表(PDF) 8 Page - Microchip Technology |
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MCP3564 数据表(HTML) 8 Page - Microchip Technology |
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8 / 108 page  MCP3561/2/4 DS20006181C-page 8 2019-2021 Microchip Technology Inc. Integral Nonlinearity (Note 7) INL -10 — +10 ppm FSR Gain = 0.33x (Note 2) -7 — +7 Gain = 1x (Note 2) -7 — +7 Gain = 2x (Note 2) -10 — +10 Gain = 4x (Note 2) -20 — +20 Gain = 8x (Note 2) -32 — +32 Gain = 16x (Note 2) AVDD Power Supply Rejection Ratio DC PSRR — -76 – 20 x LOG (Gain) —dB DVDD Power Supply Rejection Ratio DC PSRR — -110 — dB DVDD varies from 1.8V to 3.6V, VIN =0V DC Common-Mode Rejection Ratio DC CMRR — -126 — dB VINCOM varies from 0V to AVDD, VIN =0V AC Performance Signal-to-Noise and Distortion Ratio SINAD 105.8 106.7 — dB AVDD =DVDD =VREF =3.3V and TA =+25°C (Note 2) Signal-to-Noise Ratio SNR 106.7 107.2 — dBc AVDD =DVDD =VREF =3.3V and TA =+25°C (Note 2) Total Harmonic Distortion THD — -116 -111 dB AVDD =DVDD =VREF =3.3V and TA = +25°C, includes the first ten harmonics (Note 2) Spurious-Free Dynamic Range SFDR 110 120 — dBc AVDD =DVDD =VREF =3.3V and TA =+25°C (Note 2) Input Channel Crosstalk CTALK — -130 — dB VIN = 0V, Perturbation= 0dB at 50 Hz, applies to all perturbation channels and all input channels AC Power Supply Rejection Ratio AC PSRR — -75 – 20 x LOG (Gain) —dB VIN =0V, DVDD =3.3V, AVDD = 3.3V + 0.3 VP, 50 Hz AC Common-Mode Rejection Ratio AC CMRR — -122 — dB VINCOM = 0 dB at 50 Hz, VIN =0V ELECTRICAL CHARACTERISTICS (CONTINUED) Electrical Specifications: Unless otherwise indicated, all parameters apply at AVDD = 2.7V to 3.6V, DVDD = 1.8V to AVDD +0.1V, MCLK = 4.9152 MHz, VREF =AVDD, ADC_MODE[1:0] = 11. All other register map bits to their default conditions, TA = -40°C to +125°C, VIN = -0.5 dBFS at 50 Hz. Parameters Sym. Min. Typ. Max. Units Conditions Note 1: This parameter is ensured by design and not 100% tested. 2: This parameter is ensured by characterization and not 100% tested. 3: REFIN- must be connected to ground for single-ended measurements. 4: Full-Scale Range (FSR) = 2 x VREF/GAIN. 5: This input impedance is due to the internal input sampling capacitor and frequency. This impedance is measured between the two input pins of the channel selected with the input multiplexer. 6: Applies to all analog gains. Offset and gain errors depend on analog gain settings. See Section 2.0 “Typical Performance Curves”. 7: INL is the difference between the endpoints line and the measured code at the center of the quantization band. 8: DIDD is measured while no transfer is present on the SPI bus. |
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