ADPA1107

Data Sheet

Rev. 0 | Page 16 of 20

THEORY OF OPERATION

The ADPA1107 is a GaN, broadband power amplifier that

delivers 45 dBm (35 W) of pulsed power. The device consists of

two cascaded gain stages. A simplified block diagram is shown

in Figure 50.

The ADPA1107 has single-ended RFIN and RFOUT ports that

are ac-coupled. The impedances of these ports are nominally

50 Ω over the 4.8 GHz to 6.0 GHz frequency range. Consequently,

the ADPA1107 can be directly inserted into a 50 Ω system

without the need for external impedance matching components

or ac coupling capacitors.

The drain bias voltage applied to the VDD1A, VDD1B,

VDD2A, and VDD2B pins biases the drains of the first and the

second gain stages, respectively (a single common supply voltage

must be used). The negative dc voltage applied to the VGG1 pin

biases the gates of the first and the second gain stages,

respectively, to allow control of the drain currents of each stage

A portion of the RF output signal is directionally coupled to a

diode for detection of the RF output power. When the diode is

dc biased, the diode rectifies the RF power and makes the RF

power available for measurement as a dc voltage at the VDET

pin. To allow temperature compensation of VDET, an identical

and symmetrically located circuit, minus the coupled RF power,

is available via VREF. Taking the difference of VREF − VDET

provides a temperature compensated signal that is proportional

to the RF output power (see Figure 51).

RFIN

RFOUT

VDD1A

VDD2A

VDD1B

VDD2B VDD2B

DIRECTIONAL

COUPLER

VDD2A

VREF

VDET

VGG1

Figure 50. Simplified Block Diagram