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ADRF5515ABCPZN-R7 数据表(PDF) 1 Page - Analog Devices |
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ADRF5515ABCPZN-R7 数据表(HTML) 1 Page - Analog Devices |
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1 / 15 page ![]() Data Sheet ADRF5515A Dual-Channel, 3.3 GHz to 4.0 GHz, 20 W Receiver Front End Rev. 0 DOCUMENT FEEDBACK TECHNICAL SUPPORT Information furnished by Analog Devices is believed to be accurate and reliable "as is". However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. FEATURES ► Integrated dual-channel RF front end ► 2-stage LNA and high power silicon SPDT switch ► On-chip bias and matching ► Single-supply operation ► High power handling at TCASE = 105°C ► LTE average power (9 dB PAR) full lifetime: 43 dBm ► Gain ► High gain mode: 36 dB typical at 3.6 GHz ► Low gain mode: 17 dB typical at 3.6 GHz ► Low noise figure ► High gain mode: 1.05 dB typical at 3.6 GHz ► Low gain mode: 1.05 dB typical at 3.6 GHz ► High isolation ► RXOUT-CHA and RXOUT-CHB: 47 dB typical ► TERM-CHA and TERM-CHB: 75 dB typical ► Low insertion loss: 0.5 dB typical at 3.6 GHz ► High OIP3: 35 dBm typical ► Power-down mode and low gain mode ► Low supply current ► High gain mode: 95 mA typical at 5 V ► Low gain mode: 48 mA typical at 5 V ► Power-down mode: 13 mA typical at 5 V ► Positive logic control ► 6 mm × 6 mm, 40-lead LFCSP package ► Pin compatible with the ADRF5515 and the ADRF5519, and the 10 W versions, ADRF5545A and ADRF5549 APPLICATIONS ► Wireless infrastructure ► TDD massive multiple input and multiple output and active antenna systems ► TDD-based communication systems FUNCTIONAL BLOCK DIAGRAM Figure 1. GENERAL DESCRIPTION The ADRF5515A is a dual-channel, integrated RF, front-end, mul- tichip module designed for time division duplexing (TDD) appli- cations. The device operates from 3.3 GHz to 4.0 GHz. The ADRF5515A is configured in dual channels with a cascading, two-stage low noise amplifier (LNA) and a high-power silicon single- pole, double-throw (SPDT) switch. In high gain mode, the cascaded two-stage LNA and switch offer a low noise figure of 1.05 dB and a high gain of 36 dB at 3.6 GHz, with an output third-order intercept (OIP3) point of 35 dBm (typical). In low gain mode, one stage of the two-stage LNA is in bypass, providing 17 dB of gain at a lower current of 48 mA. In power-down mode, the LNAs are turned off and the device draws 13 mA. In transmit operation, when RF inputs are connected to a termi- nation pin (TERM-CHA or TERM-CHB), the switch provides low insertion loss of 0.5 dB and handles long-term evolution (LTE) average power (9 dB peak to average ratio (PAR)) of 43 dBm for full lifetime operation. The device comes in an RoHS-compliant, compact, 6 mm × 6 mm, 40-lead lead frame chip scale package (LFCSP). |
类似零件编号 - ADRF5515ABCPZN-R7 |
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类似说明 - ADRF5515ABCPZN-R7 |
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