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ADPA7005CHIP 数据表(PDF) 17 Page - Analog Devices

部件名 ADPA7005CHIP
功能描述  GaAs, pHEMT, MMIC,1 W Power Amplifier, 20 GHz to 44 GHz
PDF  23 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADPA7005CHIP 数据表(HTML) 17 Page - Analog Devices

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Data Sheet
ADPA7005CHIP
Rev. 0 | Page 17 of 23
BIASING ADPA7005CHIP WITH THE HMC980LP4E
The HMC980LP4E is an active bias controller that is designed
to meet the bias requirements for enhancement mode and
depletion mode amplifiers such as the ADPA7005CHIP. The
controller provides constant drain current biasing over temperature
and part to part variation, and properly sequences gate and
drain voltages to ensure the safe operation of the amplifier. The
HMC980LP4E also offers self protection in the event of a short
circuit, as well as an internal charge pump that generates the
negative voltage needed on the gate of the ADPA7005CHIP,
and the option to use an external negative voltage source.
HMC980LP4E is also available in die form as the HMC980-DIE.
Figure 54. Functional Diagram of HMC980LP4E
APPLICATION CIRCUIT SETUP
Figure 55 displays the schematic of an application circuit using
the HMC980LP4E to control the ADPA7005CHIP. When using
an external negative supply for VNEG, refer to the schematic in
Figure 56.
In the application circuit shown in Figure 55, the ADPA7005CHIP
drain voltage and drain current are set by the following equations:
VDRAIN (5 V) = VDD (6.12 V) − IDRAIN (1600 mA) × 0.7 Ω (1)
IDRAIN (1600 mA) = 150 Ω A ÷ R10 (93.1 Ω)
(2)
where IDRAIN is constant drain current.
LIMITING VGATE FOR ADPA7005CHIP VGGx ABSOLUTE
MAXIMUM RATING REQUIREMENT
When using the HMC980LP4E to control the ADPA7005CHIP,
the minimum voltages for VNEG and VGATE must be −1.5 V
to keep these voltages within the absolute maximum rating
limits for the VGGx pads of the ADPA7005CHIP. To set the
minimum voltages, set R15 and R16 to the values shown in
Figure 55 and Figure 56. Please refer to the AN-1363 for more
information and calculations for R15 and R16.
2
1
3
4
5
6
18
17
16
15
14
13
ALM
EN
S1
S0
VDD
VDD
VG2_CONT
PACKAGE
BASE
GND
VG2
VNEG
VGATE
VDRAIN
VDRAIN
CONTROL
BLOCK
GATE
CONTROL
BAND GAP
NEGATIVE
VOLTAGE
GENERATOR



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