数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

PLL650-01XC-R 数据表(PDF) 5 Page - PhaseLink Corporation

部件名 PLL650-01XC-R
功能描述  Low EMI Network LAN Clock
PDF  7 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  PLL [PhaseLink Corporation]
网页  http://www.phaselink.com
标志 PLL - PhaseLink Corporation

PLL650-01XC-R 数据表(HTML) 5 Page - PhaseLink Corporation

  PLL650-01XC-R Datasheet HTML 1Page - PhaseLink Corporation PLL650-01XC-R Datasheet HTML 2Page - PhaseLink Corporation PLL650-01XC-R Datasheet HTML 3Page - PhaseLink Corporation PLL650-01XC-R Datasheet HTML 4Page - PhaseLink Corporation PLL650-01XC-R Datasheet HTML 5Page - PhaseLink Corporation PLL650-01XC-R Datasheet HTML 6Page - PhaseLink Corporation PLL650-01XC-R Datasheet HTML 7Page - PhaseLink Corporation  
Zoom Inzoom in Zoom Outzoom out
 5 / 7 page
background image
PLL650-01
Low EMI Network LAN Clock
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 5
APPLICATION DIAGRAM FOR SETTING CS1 (PIN 18)
Electrical Specifications
1. Absolute Maximum Ratings
PARAMETERS
SYMBOL
MIN.
MAX.
UNITS
Supply Voltage
VDD
4.6
V
Input Voltage, dc
VI
-0.5
VDD+0.5
V
Output Voltage, dc
VO
-0.5
VDD+0.5
V
Storage Temperature
TS
-65
150
°C
Ambient Operating Temperature*
TA
-40
85
°C
Junction Temperature
TJ
125
°C
Lead Temperature (soldering, 10s)
260
°C
ESD Protection, Human Body Model
2
kV
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other con-
ditions above the operational limits noted in this specification is not implied.
* Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only.
Latch
Power Up
Reset
Jumper options
10k
Clock Load
Latched
Input
Output
EN
VDD
R
up
REF/CS1
R
RB
NOTE: Rup=100k
Ω . R starts from 1 to 0 while RB starts from 0 to 1.
Internal to chip
External Circuitry



Html Pages

1 2 3 4 5 6 7


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com