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2021 Microchip Technology Inc.

DS20006510B-page 5

VC-830

FIGURE 1-3:

LVDS Test Circuit.

Enable/Disable

Outputs Enabled (Note 7)

—

—

V

—

Outputs Disabled

—

—

V

—

Disable Time

—

—

200

ns

—

E/D Pull-Up Resistance (Note 8)

—

0.5

—

2

M

E/D = GND

E/D Pull-Up Resistance

—

30

—

150

kΩ

Start-Up Time

—

—

10

ms

—

Operating Temperature

–10

—

70

°C

Ordering Option

–40

—

85

–40

—

105

ELECTRICAL CHARACTERISTICS, LVDS OPTION (CONTINUED)

Parameter

Sym.

Min.

Typ.

Max.

Units

Conditions

Note 1: The VC-830 power supply should be filtered. For example, a 10 µF, 0.1 µF, and 0.01 µF capacitor.

2: Includes calibration tolerance, operating temperature, supply voltage variations, aging, and IR reflow.

4: Output rise and fall time will be 600 ps (max.) for –40°C to +105°C operating temperature range.

5: Duty Cycle is measured as On/Time Period.

6: Measured using an Agilent E5052 Signal Source Analyzer at 25°C.

7: Outputs will be enabled if Enable/Disable is left open. There is an oscillation detection circuit that ensures

glitch free output upon power-up or enable.