SAMA5D2 datasheet(7/56 Pages) MICROCHIP

部件名	SAMA5D2

功能描述	SAMA5D2 System in Package (SIP) MPU with up to 1 Gbit DDR2 SDRAM or 2 Gbit LPDDR2 SDRAM

PDF	56 Pages

Scroll/Zoom	100%

制造商	MICROCHIP [Microchip Technology]

网页	http://www.microchip.com

标志

7 / 56 page

DDR2-SDRAM Features

• Power Supply: DDRM_VDD, DDRM_VDDL, DDRM_VDDQ = 1.8 V ±0.1 V

• Double Data Rate Architecture: Two Data Transfers per Clock Cycle

• CAS Latency: 3

• Burst Length: 8

• Bi-Directional, Differential Data Strobes (DQS and DQSN) are Transmitted/Received with Data

• Edge-Aligned with Read Data and Center-Aligned with Write Data

• DLL Aligns DQ and DQS Transitions with Clock

• Differential Clock Inputs (CLK and CLKN)

• Data Masks (DM) for Write Data

• Commands Entered on Each Positive CLK Edge, Data and Data Mask are Referenced to Both Edges of DQS

• Auto-Refresh and Self-Refresh Modes

• Precharged Power-Down and Active Power-Down

• Write Data Mask

• Write Latency = Read Latency - 1 (WL = RL - 1)

• Interface: SSTL_18

SAMA5D2 SIP

DDR2-SDRAM Features

Datasheet

DS60001484D-page 7

SAMA5D2 数据表(PDF) 7 Page - Microchip Technology