ADP5092ACPZ-1-R7 datasheet(16/28 Pages) AD

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ADP5091/ADP5092

Data Sheet

Rev. A | Page 16 of 28

THEORY OF OPERATION

The ADP5091/ADP5092 are intelligent, integrated energy

harvesting, ultralow power management solutions that include

a cold start-up circuit, one synchronous main boost controller,

and one regulated output hybrid controller with integrated

switches, a charging controller with integrated switches, and

backup power path switches. The main boost controller converts

maximum power from low voltage, high impedance dc sources,

such as PV cells, TEGs, and piezoelectric modules, to store energy

in a rechargeable battery or capacitor with storage protection

and provides power to the load. Another regulated output with

automatic hysteresis boost/LDO mode, or pure LDO mode, is

optimized to provide high efficiency across low output currents

(10 μA), see Figure 14) to high currents of 200 mA. The ADP5091/

ADP5092 can also control an additional power path from a

primary battery cell to the system. An external signal can

temporarily stop the two boost circuits to prevent interference

with RF transmission.

FAST COLD START-UP CIRCUIT (VSYS < VSYS_TH,

VIN > VIN_COLD)

The fast cold start-up circuit extracts energy available at the

VIN pin and charges only the capacitors at the SYS pin up to

VSYS_TH above which the main boost regulator and charge controller

start working. The efficient boost regulator charges storage

elements on the BAT pin when the SYS voltage is more than

the internal BAT charging threshold (VSYS_CHG). When the SYS

voltage is less than the internal BAT charging threshold with a

hysteresis, it stops charging the BAT pin and restarts charging

the SYS pin to ensure that it does not enter cold startup. Figure 41

shows the fast cold start-up sequence.

The cold start-up circuit is required when the VIN pin is more

than the minimum input voltage for the cold start (VIN_COLD),

and the energy storage voltage at the SYS pin is less than the end

of the cold start operation threshold (VSYS_TH). To complete the

cold startup, the energy harvester must supply sufficient power

(see the Energy Harvester Selection section). The cold startup,

with much lower efficiency compared to the main boost regulator,

achieves a short start-up time, creating a low shutdown current

from the system load enabled by the PGOOD signal. To bypass

the cold startup, place a primary battery at the BACK_UP pin

(see the Backup Storage Path section).

VSETSD

VSYS_CHG

VSYS_CHG_HYS

SYS

BAT

FAST

COLD

START

HIGH EFFICIENCY

LOW

EFFICIENCY

VSYS_TH

Figure 41. Fast Cold Start-Up Sequence

MAIN BOOST REGULATOR (VBAT_TERM > VSYS > VSYS_TH)

The switching mode synchronous boost regulator, with an external

inductor connected between the VIN and the SW pins, operates

in pulse frequency modulation (PFM) mode, transferring energy

stored in the input capacitor to the energy storage connected to

the BAT pin. The MPPT control loop regulates the VIN voltage

at the level sampled at the MPPT pin and stored at the capacitor

through the CBP and the AGND pins. To maintain the high

efficiency of the regulator across a wide input power range, the

current sense circuitry employs an internal dither peak current

limit to control the inductor current.

The main boost regulator operation reaches an asynchronous

mode via the energy storage controller if the BAT pin voltage is

less than the battery terminal charging threshold programmed at

the SETSD pin, or stops switching if the BAT pin voltage is

more than the battery overcharging threshold programmed at

the TERM pin. The boost regulator disables when the voltage

on the CBP pin decreases to the threshold set by the resistor at

the MINOP pin. In addition, the boost is periodically stopped

by an open voltage sampling circuit and can also be temporary

disabled by driving the DIS_SW pin high.

VIN OPEN CIRCUIT AND MPPT

By floating the MINOP pin, the MPPT no sensing mode can

operate on a fixed MPPT voltage. The MPPT pin, with a 2.0 μA

(typical) bias current through a resistor, sets the MPPT voltage,

which is the boost input regulation reference.

When the MINOP pin voltage is set lower than VMINOP_DSM

through a resistor to AGND, the ADP5091/ADP5092 operate in

MPPT dynamic sensing mode. The boost input regulation

reference is the open circuit voltage at the VIN pin scaled to a ratio

programmed by the resistor divider at the MPPT pin. To keep

the VIN voltage operating at the maximum power points available

from the energy harvester at the input of the ADP5091/ADP5092,

periodically sample the MPPT voltage and store it in the capacitor

connected to the CBP pin. The reference voltage refreshes every

16 sec (default value) by periodically disabling the boost regulator

for 256 ms (default value) and by sampling the ratio of the open

circuit voltage when the BAT voltage level exceeds the SETSD

rising threshold. The factory bit can program the sampling

cycle. Set the reference voltage by



















OC2

OC1

MPPT

Circuit

Open

(1)

where:

VIN (Open Circuit) is the input open circuit voltage (VIN_OCV) of

the input voltage.

See Figure 2 for ROC1 and ROC2.

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