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ADUCM4050BCPZ-R7 数据表(PDF) 12 Page - Analog Devices

部件名 ADUCM4050BCPZ-R7
功能描述  Ultra Low Power ARM Cortex-M4F MCU with Integrated Power Management
PDF  46 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADUCM4050BCPZ-R7 数据表(HTML) 12 Page - Analog Devices

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ADuCM4050
Data Sheet
Rev. A | Page 12 of 46
SYSTEM CLOCKS
External Crystal Oscillator Specifications
Table 10.
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions/Comments
LOW FREQUENCY EXTERNAL CRYSTAL
OSCILLATOR (LFXTAL)
Frequency
fLFXTAL
32,768
Hz
External Capacitance from
SYS_LFXTAL_IN Pin to Ground and
from SYS_LFXTAL_OUT Pin to Ground
CLFXTAL
6
10
pF
External capacitors on SYS_LFXTAL_IN
and SYS_LFXTAL_OUT pins must be
selected considering the printed circuit
board (PCB) trace capacitance due to
routing
Crystal Equivalent Series Resistance
ESRLFXTAL
30
50
kΩ
Crystal Drive Level1
50
nW
Oscillator Transconductance1
gmLFXTAL
8
µS
HIGH FREQUENCY EXTERNAL CRYSTAL
OSCILLATOR (HFXTAL)
Frequency
fHFXTAL
26
MHz
External Capacitance from
SYS_HFXTAL_IN Pin to Ground and
from SYS_HFXTAL_OUT Pin to Ground
CHFXTAL
20
pF
External capacitors on SYS_HFXTAL_IN
and SYS_HFXTAL_OUT pins must be
selected considering the PCB trace
capacitance due to routing
Crystal Equivalent Series Resistance
ESRHFXTAL
50
Ω
1
Guaranteed by design.
On-Chip Resistor-Capacitor (RC) Oscillator Specifications
Table 11.
Parameter
Symbol
Min
Typ
Max
Unit
LOW FREQUENCY RC OSCILLATOR (LFOSC)
Frequency
fLFOSC
30,800
32,768
35,062
Hz
HIGH FREQUENCY RC OSCILLATOR (HFOSC)
Frequency
fHFOSC
25.03
26
27.07
MHz
System Clocks and Phase-Locked Loop (PLL) Specifications
Table 12.
Parameter
Symbol
Min
Typ
Max
Unit
PLL SPECIFICATIONS
PLL Input Clock Frequency1
fPLLIN
16
26
MHz
PLL Output Clock Frequency2, 3
fPLLOUT
16
60
MHz
System Peripheral Clock (PCLK) Frequency
fPCLK
0.8125
52
MHz
Advanced High Performance Bus Clock (HCLK) Frequency
fHCLK
0.8125
52
MHz
1
The input to the PLL can come from either the high frequency external crystal (HFXTAL), SYS_CLKIN pin or from the high frequency internal RC oscillator (HFOSC).
2
For the maximum value, the recommended settings are PLL MSEL = 13, PLL NSEL = 16, PLL DIV2 = 1 for PLL input clock = 26 MHz; and PLL MSEL = 13, PLL NSEL = 26,
PLL DIV2 = 1 for PLL input clock = 16 MHz; see the ADuCM4050 Ultra Low Power ARM Cortex-M4F MCU with Integrated Power Management Hardware Reference for
more information on these configuration options.
3
For the minimum value, the recommended settings are PLL MSEL = 13, PLL NSEL = 30, PLL DIV2 = 0 for PLL input clock = 26 MHz; and PLL MSEL = 8, PLL NSEL = 30,
PLL DIV2 = 0 for 16 MHz.



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