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MPC8560CPX667JC 数据表(PDF) 49 Page - NXP Semiconductors |
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MPC8560CPX667JC 数据表(HTML) 49 Page - NXP Semiconductors |
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49 / 108 page  MPC8560 Integrated Processor Hardware Specifications, Rev. 4.2 Freescale Semiconductor 49 CPM Table 37 and Table 38 are examples of I2C AC parameters at I2C clock value of 100 kHz and 400 kHz respectively. Table 37. CPM I2C AC Timing (fSCL = 100 kHz) Characteristic Symbol Min Max Unit SCL clock frequency (slave) fSCL — 100 KHz SCL clock frequency (master) fSCL — 100 KHz Bus free time between transmissions tSDHDL 4.7 — μs Low period of SCL tSCLCH 4.7 — μs High period of SCL tSCHCL 4— μs Start condition setup time 2 tSCHDL 2— μs Start condition hold time 2 tSDLCL 3— μs Data hold time 2 tSCLDX 2— μs Data setup time 2 tSDVCH 3— μs SDA/SCL rise time tSRISE —1 μs SDA/SCL fall time tSFALL — 303 ns Stop condition setup time tSCHDH 2— μs Table 38. CPM I2C AC Timing (fSCL = 400 kHz) Characteristic Symbol Min Max Unit SCL clock frequency (slave) fSCL — 400 KHz SCL clock frequency (master) fSCL — 400 KHz Bus free time between transmissions tSDHDL 1.2 — μs Low period of SCL tSCLCH 1.2 — μs High period of SCL tSCHCL 1— μs Start condition setup time 2 tSCHDL 420 — ns Start condition hold time 2 tSDLCL 630 — ns Data hold time 2 tSCLDX 420 — ns Data setup time 2 tSDVCH 630 — ns SDA/SCL rise time tSRISE — 250 ns SDA/SCL fall time tSFALL —75 ns Stop condition setup time tSCHDH 420 — ns |
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