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ADP5135ACPZ-R7 数据表(PDF) 14 Page - Analog Devices

部件名 ADP5135ACPZ-R7
功能描述  Triple 1800 mA Buck Regulator with Precision Enables and Power-Good Outputs
PDF  24 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP5135ACPZ-R7 数据表(HTML) 14 Page - Analog Devices

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ADP5135
Data Sheet
Rev. 0 | Page 14 of 24
Regulator output voltages are set through external resistor
dividers or can be optionally factory programmed to default
values (see the Ordering Guide section).
When a regulator is turned on, the output voltage ramp rate is
controlled through a soft start circuit to avoid a large inrush
current caused by the charging of the output capacitors.
Power-Good Output
Power-good outputs are available for each buck channel to
monitor their respective output voltages. The PGx pin connects
to a pull-up current to drive external regulators or other
circuits. In this configuration, the PGx pin goes high when the
channel being monitored is in regulation and goes low when the
output voltage falls below 85% of the nominal VOUTx level.
The PGx pin can also drive an LED for fault monitoring. In this
configuration, a red LED, for example, is biased and current
sinks into the PGx pin when the output voltage falls below 85%
of the nominal VOUTx level, thereby turning the LED on, and
turns off when the output voltage is in regulation.
Thermal Protection
In the event that the junction temperature rises above 150°C,
the thermal shutdown circuit turns off all the regulators. Extreme
junction temperatures can be the result of high current opera-
tion, poor circuit board design, or high ambient temperature.
A 20°C hysteresis is included so that when thermal shutdown
occurs, the regulators do not return to operation until the on-chip
temperature drops below 130°C. When coming out of thermal
shutdown, all regulators restart with soft start control.
Undervoltage Lockout
To protect against battery discharge, undervoltage lockout
(UVLO) circuitry is integrated into the system. If the input
voltage on AVIN drops below the UVLO threshold, 2.45 V
minimum, all channels shut down. In the buck channels, both
the power switch and the synchronous rectifier turn off. When
the voltage on AVIN rises above the UVLO threshold, the
device is enabled once more.
Alternatively, the user can request a new device model with a
UVLO set at a higher level, suitable for 5 V supply applications,
or to a lower level, suitable for low voltage operations. To order
a device with options other than the default options listed in the
Ordering Guide section, contact your local Analog Devices,
Inc., sales or distribution representative.
In case of a thermal or UVLO event, the active pull-downs (if
factory enabled) are enabled to quickly discharge the output
capacitors. The pull-down resistors remain engaged until the
thermal fault event is no longer present or when the input
supply voltage falls below the power-on reset voltage level
(VPOR). The typical value of VPOR is approximately 1 V.
Precision Enable and Shutdown Control
The ADP5135 has an individual enable control pin for each
regulator. A voltage input to the ENx pin above the VIH_EN level
puts the device out of shutdown and turns on the housekeeping
block of the ADP5135. As the VENx level continues to rise above
the precision enable threshold (VENR), the regulators activate.
When VENx goes 80 mV typical below the VENR level, the
regulators deactivate and, when all VENx levels continue to go
down below the VIL_EN level, the device goes into shutdown
mode. In this mode, the current consumption of the device
drops to below 1.5 μA.
Figure 36 shows the activation timings for the ADP5135 when
the regulators are in sequence. VOUT1 is controlling EN2, and
VOUT2 is controlling EN3. Also shown are the individual power-
good signals (PGx) monitoring all regulators.



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