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ADP5135

Data Sheet

Rev. 0 | Page 16 of 24

Power Save Mode (PSM)

The buck regulators smoothly transition to PSM operation

when the load current decreases below the PSM current

threshold. When any of the bucks enters PSM, an offset is

induced in the PWM regulation level, which makes the output

voltage rise. When the output voltage reaches a level that is

approximately 1.5% above the PWM regulation level, PWM

operation turns off. At this point, both power switches are off,

and the buck regulators enter an idle mode. The output

capacitor discharges until the output voltage falls to the PWM

regulation voltage, at which point the device drives the inductor

to make the output voltage rise again to the upper threshold.

This process is repeated while the load current is below the

PSM current threshold.

The ADP5135 has a dedicated MODE pin controlling the PSM

and PWM operations. A logic high level applied to the MODE

pin forces all bucks to operate in PWM mode. A logic low level

sets the bucks to operate in auto PSM/PWM.

PSM Current Threshold

The PSM current threshold is set to 100 mA. The buck regulators

employ a scheme that enables this current to remain accurately

controlled, independent of input and output voltage levels. This

scheme also ensures that there is very little hysteresis between

the PSM current threshold for entry to and exit from PSM. The

PSM current threshold is optimized for excellent efficiency over

all load currents.

Oscillator/Phasing of Inductor Switching

The ADP5135 ensures that all three bucks operate at the same

switching frequency when all bucks are in PWM mode.

Additionally, the ADP5135 ensures that when all bucks are in

PWM mode, BUCK3 operates out of phase with BUCK1 and

BUCK2, whereby the BUCK3 PFET starts conducting exactly

half a clock period after the BUCK1 and BUCK2 PFETs start

conducting.

Short-Circuit Protection

The bucks include frequency foldback to prevent output current

runaway on a hard short. When the voltage at the feedback pin

falls below half the target output voltage, indicating the possi-

bility of a hard short at the output, the switching frequency is

reduced to half the internal oscillator frequency. The reduction

in the switching frequency allows more time for the inductor to

discharge, preventing a runaway of output current.

Buck Regulator Soft Start

The buck regulators have an internal soft start function that

ramps the output voltage in a controlled manner upon startup,

thereby limiting the inrush current. This prevents possible input

voltage drops when a battery or a high impedance power source

is connected to the input of the converter.

Current Limit

Each buck regulator has protection circuitry to limit the

amount of positive current flowing through the PFET switch

and the amount of negative current flowing through the

synchronous rectifier. The positive current limit on the power

switch limits the amount of current that can flow from the input

to the output. The negative current limit prevents the inductor

current from reversing direction and flowing out of the load.

100% Duty Operation

With a drop in input voltage, or with an increase in load

current, the buck regulators may reach a limit where, even with

the PFET switch on 100% of the time, the output voltage drops

below the desired output voltage. At this limit, the buck

regulators transition to a mode where the PFET switch stays on

100% of the time. When the input conditions change again and

the required duty cycle falls, the buck regulators immediately

restart PWM regulation without allowing overshoot on the

output voltage.

Active Pull-Down Resistors

All regulators have optional, factory programmable, active pull-

down resistors that discharge the respective output capacitors

when the regulators are disabled. The pull-down resistors are

connected between VOUTx and AGND. The active pull-down

resistors are disabled when the regulators are turned on. The

typical value of the pull-down resistor is 75 Ω.

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