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SPBT3.0DP2 数据表(PDF) 27 Page - STMicroelectronics |
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SPBT3.0DP2 数据表(HTML) 27 Page - STMicroelectronics |
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27 / 31 page ![]() Contents 1 Applications .......................................................................3 2 Software architecture ..............................................................4 2.1 BT stack layers ................................................................ 4 2.2 Supported profile ............................................................... 5 2.3 AT command set: Data Package.................................................. 5 3 Module block diagram .............................................................6 4 Hardware specifications ...........................................................7 4.1 Recommended operating conditions .............................................. 7 4.2 Radio features ................................................................. 7 4.3 Absolute maximum ratings....................................................... 7 4.4 Current consumption ........................................................... 7 4.5 I/O operating characteristics ..................................................... 8 4.6 Pin assignment ................................................................ 9 5 Package information..............................................................11 5.1 RF module package information ................................................. 11 6 Hardware design .................................................................13 6.1 Reflow soldering .............................................................. 13 6.2 UART interface ............................................................... 14 6.3 GPIO interface................................................................ 15 6.4 Reset circuit .................................................................. 15 6.4.1 Simple external reset circuit ............................................... 15 6.4.2 Host controlled reset circuit ................................................ 16 6.5 External LPO input circuit....................................................... 16 6.6 MFi co-processor interface...................................................... 17 6.7 PCB layout guidelines.......................................................... 18 7 Firmware upgrade ................................................................20 7.1 Enter bootloader mode ......................................................... 20 7.2 Transfer the new firmware ...................................................... 20 7.3 Exit bootloader mode .......................................................... 20 SPBT3.0DP2 Contents DS11599 - Rev 7 page 27/31 |
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