USB7252SLASHKDX datasheet(35/65 Pages) MICROCHIP

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2018 - 2020 Microchip Technology Inc.

DS00002736D-page 35

USB7252

7.0

DEVICE INTERFACES

The USB7252 provides multiple interfaces for configuration, external memory access, etc.. This section details the var-

ious device interfaces:

• SPI/SQI Master Interface

• SMBus/I2C Master/Slave Interfaces

• I2S Interface

• UART Interface

7.1

SPI/SQI Master Interface

The SPI/SQI controller has two basic modes of operation: execution of an external hub firmware image, or the USB to

SPI bridge. On power up, the firmware looks for an external SPI flash device that contains a valid signature of 2DFU

(device firmware upgrade) beginning at address 0x3FFFA. If a valid signature is found, then the external ROM mode is

enabled and the code execution begins at address 0x0000 in the external SPI device. If a valid signature is not found,

then execution continues from internal ROM and the SPI interface can be used as a USB to SPI bridge.

The entire firmware image is then executed in place entirely from the SPI interface. The SPI interface will remain con-

tinuously active while the hub is in the runtime state. The hub configuration options are also loaded entirely out of the

SPI memory device. Both the internal ROM firmware image and internal OTP memory are completely ignored while exe-

cuting the firmware and configuration from the external SPI memory.

The second mode of operation is the USB to SPI bridge operation. Additional details on this feature can be found in

Section 8.9, USB to SPI Bridging.

Table 7-1 details how the associated pins are mapped in SPI vs. SQI mode

Note:

For details on how to enable each interface, refer to Section 3.3, Configuration Straps and Programmable

Functions.

For information on device connections, refer to Section 4.0, Device Connections. For information on device

configuration, refer to Section 6.0, Device Configuration.

Microchip provides a comprehensive software programming tool, MPLAB Connect Configurator (formerly

ProTouch2), for configuring the USB7252 functions, registers and OTP memory. All configuration is to be

performed via the MPLAB Connect Configurator programming tool. For additional information on this tool,

refer to th MPLAB Connect Configurator programming tool product page at http://www.microchip.com/

design-centers/usb/mplab-connect-configurator.

TABLE 7-1:

SPI/SQI PIN USAGE

SPI Mode

SQI Mode

Description

SPI_CE_N

SQI_CE_N

SPI/SQI Chip Enable (Active Low)

SPI_CLK

SQI_CLK

SPI/SQI Clock

SPI_D0

SQI_D0

SPI Data Out; SQI Data I/O 0

SPI_D1

SQI_D1

SPI Data In; SQI Data I/O 1

SQI_D2

SQI Data I/O 2

SQI_D3

SQI Data I/O 3

Note:

For SPI/SQI master timing information, refer to Section 9.6.10, SPI/SQI Master Timing.

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