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ADP7112ACBZ-3.3-R7 数据表(PDF) 6 Page - Analog Devices |
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ADP7112ACBZ-3.3-R7 数据表(HTML) 6 Page - Analog Devices |
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6 / 21 page ![]() ADP7112 Data Sheet Rev. D | Page 6 of 21 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TOP VIEW (BALL SIDE DOWN) Not to Scale ADP7112 1 A B C VIN SS EN GND 2 BALL A1 INDICATOR SENSE/ ADJ VOUT Figure 3. Pin Configuration Table 5. Pin Function Descriptions Pin Mnemonic Description A1 VIN Regulator Input Supply. Bypass VIN to GND with a 2.2 μF or greater capacitor. B1 SS Soft Start. An external capacitor connected to this pin determines the soft start time. Leave this pin open for a typical 380 μs start-up time. Do not ground this pin. C1 EN The enable pin controls the operation of the LDO. Drive EN high to turn on the regulator. Drive EN low to turn off the regulator. For automatic startup, connect EN to VIN. A2 VOUT Regulated Output Voltage. Bypass VOUT to GND with a 2.2 μF or greater capacitor. B2 SENSE/ADJ Sense Input (SENSE). Connect to load. Adjustable Model (ADJ). The adjustable model has a fixed output set to 1.2 V. The output can be set to a voltage higher than 1.2 V by connecting an external resistor divider to the ADJ pin. C2 GND Ground. |
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