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PCF8536AT 数据表(PDF) 28 Page - NXP Semiconductors |
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PCF8536AT 数据表(HTML) 28 Page - NXP Semiconductors |
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28 / 54 page ![]() PCA8576F All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 3 — 3 December 2014 28 of 54 NXP Semiconductors PCA8576F Automotive 40 × 4 LCD driver 8.4 Acknowledge The number of data bytes transferred between the START and STOP conditions from transmitter to receiver is unlimited. Each byte of eight bits is followed by an acknowledge cycle. • A slave receiver, which is addressed, must generate an acknowledge after the reception of each byte. • A master receiver must generate an acknowledge after the reception of each byte that has been clocked out of the slave transmitter. • The device that acknowledges must pull-down the SDA line during the acknowledge clock pulse, so that the SDA line is stable LOW during the HIGH period of the acknowledge related clock pulse (set-up and hold times must be taken into consideration). • A master receiver must signal an end of data to the transmitter by not generating an acknowledge on the last byte that has been clocked out of the slave. In this event, the transmitter must leave the data line HIGH to enable the master to generate a STOP condition. Acknowledgement on the I2C-bus is illustrated in Figure 23. Fig 22. System configuration Fig 23. Acknowledgement of the I2C-bus |
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