CMOS Linear Regulator

Data Sheet

ADP1764

Rev. A

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FEATURES

4 A maximum output current

Low input voltage supply range

Ultralow noise: 2 μV rms, 100 Hz to 100 kHz

Noise spectral density: 5 nV/√Hz at 10 kHz; 4 nV/√Hz at 100 kHz

Low dropout voltage: 47 mV typical at 4 A load

Operating supply current: 5 mA typical at no load

±1.5% fixed output voltage accuracy over line, load, and

temperature

Excellent power supply rejection ratio (PSRR) performance

69 dB typical at 10 kHz at 4 A load

46 dB typical at 100 kHz at 4 A load

Excellent load/line transient response

Soft start to reduce inrush current

Optimized for small 22 μF ceramic capacitors

Current-limit and thermal overload protection

Power-good indicator

Precision enable

16-lead, 3 mm × 3 mm LFCSP package

APPLICATIONS

Regulation to noise sensitive applications such as radio

frequency (RF) transceivers, analog-to-digital converter

(ADC) and digital-to-analog converter (DAC) circuits,

phase-locked loops (PLLs), voltage controlled oscillators

(VCOs) and clocking integrated circuits

Field-programmable gate array (FPGA) and digital signal

processor (DSP) supplies

Medical and healthcare

Industrial and instrumentation

GENERAL DESCRIPTION

The ADP1764 is a low noise, low dropout (LDO) linear

regulator. It is designed to operate from a single input supply

with an input voltage as low as 1.10 V without the requirement

of an external bias supply to increase efficiency and provide up

The low 47 mV typical dropout voltage at a 4 A load allows the

ADP1764 to operate with a small headroom while maintaining

regulation and providing better efficiency.

The ADP1764 is optimized for stable operation with small 22 μF

ceramic output capacitors. The ADP1764 delivers optimal transient

performance with minimal printed circuit board (PCB) area.

TYPICAL APPLICATION CIRCUITS

VIN

EN

SS

VREG

VOUT

SENSE

22µF

PG

100kΩ

PG

VADJ

GND

REFCAP

22µF

ON

OFF

ADP1764

1µF

1µF

10nF

Figure 1. Fixed Output Operation

VIN

EN

SS

VREG

VOUT

SENSE

22µF

PG

100kΩ

PG

VADJ

GND

REFCAP

22µF

ON

OFF

ADP1764

1µF

1µF

10nF

10kΩ

Figure 2. Adjustable Output Operation

The ADP1764 is available in fixed output voltages ranging from

output model can be set from 0.5 V to 1.5 V through an

external resistor connected between VADJ and ground.

The ADP1764 has an externally programmable soft start time by

connecting a capacitor to the SS pin. Short-circuit and thermal

overload protection circuits prevent damage in adverse conditions.

The ADP1764 is available in a small, 16-lead LFCSP package for

the smallest footprint solution to meet a variety of applications.

Table 1. Related Devices

Model

Input

Voltage

Maximum

Current

Fixed/

Adjustable

Package

ADP1761

1.10 V to 1.98 V

1 A

Fixed/

adjustable

16-lead

LFCSP

ADP1762

1.10 V to 1.98 V

2 A

Fixed/

adjustable

16-lead

LFCSP

ADP1763

1.10 V to 1.98 V

3 A

Fixed/

adjustable

16-lead

LFCSP

ADP1740/

ADP1741

1.6 V to 3.6 V

2 A

Fixed/

adjustable

16-lead

LFCSP

ADP1752/

ADP1753

1.6 V to 3.6 V

0.8 A

Fixed/

adjustable

16-lead

LFCSP

ADP1754/

ADP1755

1.6 V to 3.6 V

1.2 A

Fixed/

adjustable

16-lead

LFCSP