ADP1764

Data Sheet

Rev. A | Page 20 of 20

OUTLINE DIMENSIONS

3.10

3.00 SQ

2.90

0.28

0.23

0.18

1.80

1.70 SQ

1.60

1

0.50

BSC

BOTTOM VIEW

TOP VIEW

16

5

8

9

12

13

4

*0.40

0.35

0.30

0.05 MAX

0.02 NOM

0.203 REF

0.20 MIN

COPLANARITY

0.08

PIN 1

INDICATOR

0.80

0.75

0.70

FOR PROPER CONNECTION OF

THE EXPOSED PAD, REFER TO

THE PIN CONFIGURATION AND

FUNCTION DESCRIPTIONS

SECTION OF THIS DATA SHEET.

*COMPLIANT TO JEDEC STANDARDS MO-220-WEED-4

WITH EXCEPTION TO LEAD LENGHT.

EXPOSED

PAD

PIN 1

INDIC ATOR AREA OPTIONS

(SEE DETAIL A)

DETAIL A

(JEDEC 95)

SEATING

PLANE

Figure 60. 16-Lead Lead Frame Chip Scale Package [LFCSP]

3 mm × 3 mm Body and 0.75 mm Package Height

(CP-16-48)

Dimensions shown in millimeters

ORDERING GUIDE

Temperature Range

Output Voltage (V)

Package Description

Package Option

Branding

ADP1764ACPZ0.85-R7

−40°C to +125°C

0.85

16-Lead LFCSP

CP-16-48

LUW

ADP1764ACPZ-0.9-R7

−40°C to +125°C

0.9

16-Lead LFCSP

CP-16-48

LUX

ADP1764ACPZ0.95-R7

−40°C to +125°C

0.95

16-Lead LFCSP

CP-16-48

LUY

ADP1764ACPZ-1.0-R7

−40°C to +125°C

1.0

16-Lead LFCSP

CP-16-48

LUZ

ADP1764ACPZ-1.1-R7

−40°C to +125°C

1.1

16-Lead LFCSP

CP-16-48

LV0

ADP1764ACPZ-1.2-R7

−40°C to +125°C

1.2

16-Lead LFCSP

CP-16-48

LV1

ADP1764ACPZ1.25-R7

−40°C to +125°C

1.25

16-Lead LFCSP

CP-16-48

LV2

ADP1764ACPZ-1.3-R7

−40°C to +125°C

1.3

16-Lead LFCSP

CP-16-48

LV3

ADP1764ACPZ-1.5-R7

−40°C to +125°C

1.5

16-Lead LFCSP

CP-16-48

LV4

ADP1764ACPZ-R7

−40°C to +125°C

Adjustable

16-Lead LFCSP

CP-16-48

LUV

ADP1764-1.0-EVALZ

1.0

Evaluation Board (Fixed)

ADP1764-ADJ-EVALZ

1.0

Evaluation Board (Adjustable)

include the following: 0.55 V, 0.6 V, 0.65 V, 0.7 V, 0.75 V, 0.8 V, 1.05 V, 1.15 V, 1.35 V, 1.4 V, and 1.45 V.

©2017 Analog Devices, Inc. All rights reserved. Trademarks and

registered trademarks are the property of their respective owners.

D14939-0-6/17(A)