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ADE7932 数据表(PDF) 67 Page - Analog Devices |
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ADE7932 数据表(HTML) 67 Page - Analog Devices |
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67 / 125 page ![]() Data Sheet ADE7978/ADE7933/ADE7932/ADE7923 Rev. D | Page 67 of 125 APPARENT POWER CALCULATION Apparent power is defined as the maximum active power that can be delivered to a load. One way to obtain the apparent power is by multiplying the voltage rms value by the current rms value (also called the arithmetic apparent power). S = V rms × I rms (41) where: S is the apparent power. V rms and I rms are the rms voltage and current, respectively. The ADE7978 computes the arithmetic apparent power on each phase. Figure 89 illustrates the signal processing in each phase for the calculation of the apparent power in the ADE7978. Because V rms and I rms contain all harmonic information, the apparent power computed by the ADE7978 is total apparent power. The ADE7978 does not compute fundamental apparent power. The ADE7978 stores the instantaneous phase apparent powers in the AVA, BVA, and CVA registers (Address 0xE51E to Address 0xE520). The equation for apparent power is 4 2 1 × × × = PMAX I I V V xVA FS FS (42) where: V and I are the rms values of the phase voltage and current. VFS and IFS are the rms values of the phase voltage and current when the ADC inputs are at full scale. PMAX = 26,991,271, the instantaneous power computed when the ADC inputs are at full scale and in phase. The xVA[23:0] waveform registers can be accessed using any of the serial port interfaces. For more information, see the Waveform Sampling Mode section. The ADE7978 can also compute the apparent power by multi- plying the phase rms current by an rms voltage that is introduced externally. For more information, see the Apparent Power Calculation Using VNOM section. APPARENT POWER GAIN CALIBRATION The average apparent power in each phase can be scaled by ±100% by writing to the appropriate 24-bit phase gain registers: APGAIN, BPGAIN, or CPGAIN (Address 0x4399 to Address 0x439B). The same registers are used to compensate the other powers computed by the ADE7978. For more information about these registers, see the Active Power Gain Calibration section. APPARENT POWER OFFSET CALIBRATION Each rms measurement includes an offset compensation register to calibrate and eliminate the dc component in the rms value (see the Root Mean Square Measurement section). The voltage and current rms values are multiplied together in the apparent power signal processing. Because no additional offsets are created in the multiplication of the rms values, there is no specific offset compensation for the apparent power signal processing. The offset compensation of the apparent power measurement in each phase is accomplished by calibrating each individual rms measurement. APPARENT POWER CALCULATION USING VNOM The ADE7978 can compute the apparent power by multiplying the phase rms current by an rms voltage introduced externally in the 24-bit signed VNOM register (Address 0xE533). When one of Bits[13:11] (VNOMCEN, VNOMBEN, or VNOMAEN) in the COMPMODE register (Address 0xE60E) is set to 1, the apparent power in the specified phase (Phase x for VNOMxEN) is computed in this way. When the VNOMxEN bits are cleared to 0 (the default value), the arithmetic apparent power is computed. The VNOM register value can be calculated as follows: VNOM = V/VFS × 3,761,808 (43) where: V is the nominal phase rms voltage. VFS is the rms value of the phase voltage when the ADC inputs are at full scale. The serial ports of the ADE7978 work with 32-, 16-, or 8-bit words, whereas the DSP works with 28-bit words. Like the SAGLVL register, the VNOM register is transmitted as a 32-bit register with the eight MSBs padded with 0s (see Figure 69). |
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