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PPC5604BAMLL6R 数据表(PDF) 68 Page - NXP Semiconductors |
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PPC5604BAMLL6R 数据表(HTML) 68 Page - NXP Semiconductors |
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68 / 109 page ![]() MPC5604B/C Microcontroller Data Sheet, Rev. 15 Package pinouts and signal descriptions NXP Semiconductors 68 Figure 18. Slow external crystal oscillator (32 kHz) timing diagram 2.23 FMPLL electrical characteristics The device provides a frequency-modulated phase-locked loop (FMPLL) module to generate a fast system clock from the main oscillator driver. 2 This is the recommended range of load capacitance at OSC32K_XTAL and OSC32K_EXTAL with respect to ground. It includes all the parasitics due to board traces, crystal and package. 3 Maximum ESR (R m) of the crystal is 50 kΩ 4 C0 includes a parasitic capacitance of 2.0 pF between OSC32K_XTAL and OSC32K_EXTAL pins Table 39. Slow external crystal oscillator (32 kHz) electrical characteristics Symbol C Parameter Conditions1 1 V DD = 3.3 V ± 10% / 5.0 V ± 10%, TA = −40 to 125 °C, unless otherwise specified. Values are specified for no neighbor GPIO pin activity. If oscillator is enabled (OSC32K_XTAL and OSC32K_EXTAL pins), neighboring pins should not toggle. Value Unit Min Typ Max fSXOSC SR — Slow external crystal oscillator frequency — 32 32.768 40 kHz VSXOSC CC T Oscillation amplitude — — 2.1 — V ISXOSCBIAS CC T Oscillation bias current — — 2.5 — µA ISXOSC CC T Slow external crystal oscillator consumption — — — 8 µA TSXOSCSU CC T Slow external crystal oscillator start-up time — — — 22 2 Start-up time has been measured with EPSON TOYOCOM MC306 crystal. Variation may be seen with other crystal. s OSCON bit (OSC_CTL register) TSXOSCSU 1 VOSC32K_XTAL VSXOSC valid internal clock 90% 10% 1/fSXOSC 0 |
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