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ADP1031ACPZ-3-R7 数据表(PDF) 20 Page - Analog Devices

部件名 ADP1031ACPZ-3-R7
功能描述  Three-Channel, Isolated Micropower Management Unit with Seven Digital Isolators
PDF  38 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP1031ACPZ-3-R7 数据表(HTML) 20 Page - Analog Devices

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ADP1031
Data Sheet
Rev. A | Page 20 of 38
CH1 50mV
CH2 100mA
M2.00µs
A CH2
36.0mA
T
595.000µs
BW
BW
CH3 10.0V BW
1
2
3
VSW3
ISW3
VOUT3
Figure 46. Inverting Regulator Discontinuous Conduction Operation
Showing IL3, Switch Node Voltage, and Output Ripple, TA = +25°C,
VOUT1 = +24 V, VOUT3 = −15 V, IOUT3 = −20 mA
CH1 5.00mA
CH2 200mV
M2.00ms A CH1
4.40mA
T
6.0100ms
BW
BW
CH3 20.0V BW
1
2
3
IOUT3
VOUT3
VSW3
Figure 47. Inverting Regulator Load Transient Response, VOUT1 = +24 V,
VOUT3 = −15 V, IOUT2 = −0.3 mA to −7 mA Step, TA = +25°C
0
2
4
6
8
10
0
10
20
30
40
50
60
70
80
90
100
DATA RATE (Mbps)
VMVDD = 2.5V, VSVDD1 = 1.8V
VMVDD = 3.3V, VSVDD1 = 3.3V
VMVDD = 5.0V, VSVDD1 = 5.0V
Figure 48. MVDD Supply Current (IMVDD) per SPI Input vs. Data Rate at Various
Supply Voltages, MSS Is Low, Clock Signal Applied on Single SPI Channel,
Other Input Channels Tied Low
CH1 1.00V
CH2 200mA
M200µs
A CH2
60.0mA
T
698.000µs
BW
BW
CH3 10.0V BW
1
2
3
ISW3
VOUT3
VSW3
Figure 49. Inverting Regulator Short-Circuit Current Limit During Startup,
VOUT1 = +24 V, VOUT3 = SGND2, TA = +25°C
CH1 5.00mA
CH2 500mV
M2.00ms A CH1
4.40mA
T
6.0100ms
BW
BW
CH3 20.0V BW
1
2
3
IOUT3
VOUT3
VSW3
Figure 50. Inverting Regulator Load Transient Response, VOUT1 = +6 V,
VOUT3 = −15 V, IOUT2 = −0.3 mA to −7 mA Step, TA = +25°C
0
2
4
6
8
10
0
10
20
30
40
50
60
70
80
90
100
DATA RATE (Mbps)
VMVDD = 2.5V, VSVDD1 = 1.8V
VMVDD = 3.3V, VSVDD1 = 3.3V
VMVDD = 5.0V, VSVDD1 = 5.0V
Figure 51. SVDD1 Supply Current (ISVDD1) per SPI Input vs. Data Rate at
Various Supply Voltages, SSS Is Low, Clock Signal Applied on Single SPI
Channel, Other Input Channels Tied Low



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