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SWCS049E 数据表(PDF) 39 Page - Texas Instruments |
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SWCS049E 数据表(HTML) 39 Page - Texas Instruments |
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39 / 144 page  39 TPS65911 www.ti.com SWCS049S – JUNE 2010 – REVISED AUGUST 2018 Submit Documentation Feedback Product Folder Links: TPS65911 Specifications Copyright © 2010–2018, Texas Instruments Incorporated (1) TdSONT = 30 ms, as in example boot sequence. Table 5-4 lists the power control timing characteristics. Table 5-4. Power Control Timing Characteristics PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tdbPWRONF PWRON falling-edge debouncing delay 100 ms tdbPWRONR PWRON rising-edge debouncing delay 3 × tCK32k = 94 µs tdbPWRHOLD PWRHOLD rising-edge debouncing delay 2 × tCK32k = 63 µs tdOINT1 INT1 (internal) power-on pulse duration after PWRON low-level (debounced) event 1 s tdONPWHOL D Delay to set high PWRHOLD signal or DEV_ON control bit after NRESPWON released to keep on the supplies tdOINT1 – tDSONT = 970(1) ms tdPWRONLP PWRON long-press delay PWRON falling-edge to PWRON_LP_IT 4 s tdPWRONLPT O PWROW long-press interrupt (PWRON_LP_IT) to supplies switch- off PWRON_LP_IT to NRESPWRON falling-edge 1 s |
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