SWCS049G datasheet(62/144 Pages) TI

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TPS65911

SWCS049S – JUNE 2010 – REVISED AUGUST 2018

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Detailed Description

This drift can be balanced to compensate for any inaccuracy of the 32-kHz oscillator. Software must

calibrate the oscillator frequency, calculate the drift compensation versus 1-hour time period; and then

load the compensation registers with the drift compensation value. Indeed, if the AUTO_COMP_EN bit in

the RTC_CTRL_REG is enabled, the value of COMP_REG (in twos-complement) is added to the RTC

32-kHz counter at each hour and 1 second. When COMP_REG is added to the RTC 32-kHz counter, the

duration of the current second becomes (32768 – COMP_REG)/32768s; so, the RTC can be

compensated with a 1/32768 s/hour time unit accuracy.

NOTE

The compensation is considered once written into the registers.

6.10 Backup Battery Management

The device includes a backup battery switch connecting the VRTC regulator input to a primary battery

(VCC7) or to a backup battery (VBACKUP), depending on the voltage value of the battery.

The VRTC supply can then be maintained during a BACKUP state as long as the input voltage is high

enough (> VBNPR threshold). Below the VBNPR voltage threshold, the digital core of the device is set

under reset by internal signal Power-on Reset (POR).

The backup domain functions which are always supplied from VRTC are:

•

The internal 32-kHz oscillator

•

Backup registers

The backup battery can be charged from the primary battery through an embedded charger. The backup

battery charge voltage and enable is controlled through BBCH_REG register programming. This register

content is maintained during the device BACKUP state.

Hence, when enabled, the backup battery charge is maintained as long as the primary battery voltage is

higher than the VMBLO threshold and the backup battery voltage.

6.11 Backup Registers

As part of the RTC, the device contains five 8-bit registers that can be used for storage by the application

firmware when the external host is powered down. These registers retain their content as long as the

VRTC is active.

6.12 I

2C Interface

A general-purpose serial control interface (CTL-I2C) allows read and write access to the configuration

registers of all resources of the system.

A second serial control interface (optional mode for EN1 and EN2 pins) can be dedicated to DVFS.

Both control interfaces are compliant with the HS-I2C specification.

These interfaces support the standard slave mode (100 Kbps), fast mode (400 Kbps), and high-speed

mode (3.4 Mbps). The general-purpose I2C module using one slave hard-coded address (ID1 = 2Dh). The

voltage scaling dedicated I2C module uses one slave hard-coded address (ID0 = 12h). The master mode

is not supported.

Addressing:

The device supports seven-bit mode addressing.

It does not support the following features:

•

10-bit addressing

•

General call

SWCS049G 数据表(PDF) 62 Page - Texas Instruments

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