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AM6442...ALV 数据表(PDF) 84 Page - Texas Instruments

部件名 AM6442...ALV
功能描述  AM64x Sitara™ Processors
PDF  244 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

AM6442...ALV 数据表(HTML) 84 Page - Texas Instruments

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Table 6-59. PRU_ICSSG0 Signal Descriptions (continued)
SIGNAL NAME [1]
PIN TYPE [2]
DESCRIPTION [3]
ALV PIN [4]
PRG0_RGMII1_RD0
I
PRU_ICSSG RGMII Receive Data
Y1
PRG0_RGMII1_RD1
I
PRU_ICSSG RGMII Receive Data
R4
PRG0_RGMII1_RD2
I
PRU_ICSSG RGMII Receive Data
U2
PRG0_RGMII1_RD3
I
PRU_ICSSG RGMII Receive Data
V2
PRG0_RGMII1_TD0
O
PRU_ICSSG RGMII Transmit Data
Y3
PRG0_RGMII1_TD1
O
PRU_ICSSG RGMII Transmit Data
AA3
PRG0_RGMII1_TD2
O
PRU_ICSSG RGMII Transmit Data
R6
PRG0_RGMII1_TD3
O
PRU_ICSSG RGMII Transmit Data
V4
PRG0_RGMII2_RD0
I
PRU_ICSSG RGMII Receive Data
Y2
PRG0_RGMII2_RD1
I
PRU_ICSSG RGMII Receive Data
W2
PRG0_RGMII2_RD2
I
PRU_ICSSG RGMII Receive Data
V3
PRG0_RGMII2_RD3
I
PRU_ICSSG RGMII Receive Data
T4
PRG0_RGMII2_TD0
O
PRU_ICSSG RGMII Transmit Data
W4
PRG0_RGMII2_TD1
O
PRU_ICSSG RGMII Transmit Data
Y4
PRG0_RGMII2_TD2
O
PRU_ICSSG RGMII Transmit Data
T6
PRG0_RGMII2_TD3
O
PRU_ICSSG RGMII Transmit Data
U6
PRG0_UART0_CTSn
I
PRU-ICSSG UART Clear to Send (active low)
W6
PRG0_UART0_RTSn
O
PRU-ICSSG UART Request to Send (active low)
AA5
PRG0_UART0_RXD
I
PRU-ICSSG UART Receive Data
Y5
PRG0_UART0_TXD
O
PRU-ICSSG UART Transmit Data
V6
Table 6-60. PRU_ICSSG1 Signal Descriptions
SIGNAL NAME [1]
PIN TYPE [2]
DESCRIPTION [3]
ALV PIN [4]
PRG1_ECAP0_IN_APWM_OUT
IO
PRU-ICSSG Enhanced Capture (ECAP) Input or
Auxiliary PWM (APWM) Ouput
V12
PRG1_ECAP0_SYNC_IN
I
PRU-ICSSG ECAP Sync Input
Y13
PRG1_ECAP0_SYNC_OUT
O
PRU-ICSSG ECAP Sync Output
AA14
PRG1_IEP0_EDIO_OUTVALID
O
PRU_ICSSG Industrial Ethernet Digital I/O Outvalid
D14
PRG1_IEP0_EDC_LATCH_IN0
I
PRU_ICSSG Industrial Ethernet Distributed Clock
Latch Input
V7
PRG1_IEP0_EDC_LATCH_IN1
I
PRU_ICSSG Industrial Ethernet Distributed Clock
Latch Input
U13
PRG1_IEP0_EDC_SYNC_OUT0
O
PRU_ICSSG Industrial Ethernet Distributed Clock
Sync Output
W7
PRG1_IEP0_EDC_SYNC_OUT1
O
PRU_ICSSG Industrial Ethernet Distributed Clock
Sync Output
U7
PRG1_IEP0_EDIO_DATA_IN_OUT28
IO
PRU_ICSSG Industrial Ethernet Digital I/O Data Input/
Output
U15
PRG1_IEP0_EDIO_DATA_IN_OUT29
IO
PRU_ICSSG Industrial Ethernet Digital I/O Data Input/
Output
U14
PRG1_IEP0_EDIO_DATA_IN_OUT30
IO
PRU_ICSSG Industrial Ethernet Digital I/O Data Input/
Output
V14
PRG1_IEP0_EDIO_DATA_IN_OUT31
IO
PRU_ICSSG Industrial Ethernet Digital I/O Data Input/
Output
W14
PRG1_IEP1_EDC_LATCH_IN0
I
PRU_ICSSG Industrial Ethernet Distributed Clock
Latch Input
Y13
PRG1_IEP1_EDC_LATCH_IN1
I
PRU_ICSSG Industrial Ethernet Distributed Clock
Latch Input
V15
AM6442, AM6441, AM6421, AM6412, AM6411
SPRSP56D – JANUARY 2021 – REVISED JULY 2022
www.ti.com
84
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Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: AM6442 AM6441 AM6421 AM6412 AM6411



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