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AM6442...ALV 数据表(PDF) 179 Page - Texas Instruments |
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AM6442...ALV 数据表(HTML) 179 Page - Texas Instruments |
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179 / 244 page  7.10.5.12.2.1 Default Speed Mode Table 7-78, Figure 7-66, Table 7-79, and Figure 7-67 present timing requirements and switching characteristics for MMC1 – Default Speed Mode. Table 7-78. Timing Requirements for MMC1 – Default Speed Mode see Figure 7-66 NO. MIN MAX UNIT DS1 tsu(cmdV-clkH) Setup time, MMC1_CMD valid before MMCi_CLK rising edge 2.55 ns DS2 th(clkH-cmdV) Hold time, MMC1_CMD valid after MMC1_CLK rising edge 19.67 ns DS3 tsu(dV-clkH) Setup time, MMC1_DAT[3:0] valid before MMC1_CLK rising edge 2.55 ns DS4 th(clkH-dV) Hold time, MMC1_DAT[3:0] valid after MMC1_CLK rising edge 19.67 ns MMC[ ]_CLK x M [ ]_ MC CMD x MMC DAT [ ]_ [3:0] x DS1 DS2 DS3 DS4 Figure 7-66. MMC1 – Default Speed – Receive Mode Table 7-79. Switching Characteristics for MMC1 – Default Speed Mode see Figure 7-67 NO. PARAMETER MIN MAX UNIT fop(clk) Operating frequency, MMC1_CLK 25 MHz DS5 tc(clk) Cycle time, MMC1_CLK 40 ns DS6 tw(clkH) Pulse duration, MMC1_CLK high 18.7 ns DS7 tw(clkL) Pulse duration, MMC1_CLK low 18.7 ns DS8 td(clkL-cmdV) Delay time, MMC1_CLK falling edge to MMC1_CMD transition - 14.1 14.1 ns DS9 td(clkL-dV) Delay time, MMC1_CLK falling edge to MMC1_DAT[3:0] transition - 14.1 14.1 ns MMC[ ]_CLK x MMC CMD [ ]_ x MMC DAT [ _ [3:0] x] D 5 S D 7 S D 8 S D 9 S DS6 Figure 7-67. MMC1 – Default Speed – Transmit Mode www.ti.com AM6442, AM6441, AM6421, AM6412, AM6411 SPRSP56D – JANUARY 2021 – REVISED JULY 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 179 Product Folder Links: AM6442 AM6441 AM6421 AM6412 AM6411 |
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