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AM6442...ALV 数据表(PDF) 199 Page - Texas Instruments |
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AM6442...ALV 数据表(HTML) 199 Page - Texas Instruments |
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199 / 244 page  Table 7-115. PRU_ICSSG PRU Switching Characteristics – Peripheral Interface Mode see Figure 7-99 NO. PARAMETER DESCRIPTION MIN MAX UNIT PRPIF3 tc(PIF_CLK) Cycle time, PIF_CLK 30 ns PRPIF4 tw(PIF_CLKH) Pulse duration, PIF_CLK high 0.475*P (1) ns PRPIF5 tw(PIF_CLKL) Pulse duration, PIF_CLK low 0.475*P (1) ns PRPIF6 td(PIF_CLK- PIF_DATA_OUT) Delay time, PIF_CLK fall to PIF_DATA_OUT -5 5 ns PRPIF7 td(PIF_CLK-PIF_DATA_EN) Delay time, PIF_CLK fall to PIF_DATA_EN -5 5 ns (1) P = 1x (or TX) clock period in ns, defined by PRUn_ED_TX_DIV_FACTOR and PRUn_ED_TX_DIV_FACTOR_FRAC in the ICSSG_PRUn_ED_TX_CFG_REG register. PRUn represents the respective PRU0 or PRU1 instance. PIF_CLK PIF_DATA_OUT PRPIF3 PRPIF4 PRPIF6 PRPIF5 PIF_DATA_EN PRPIF7 Figure 7-99. PRU_ICSSG PRU Peripheral Interface Switching Characteristics 7.10.5.16.2 PRU_ICSSG Pulse Width Modulation (PWM) Table 7-116. PRU_ICSSG PWM Timing Conditions PARAMETER MIN MAX UNIT INPUT CONDITIONS SRI Input slew rate 1 4 V/ns OUTPUT CONDITIONS CL Output load capacitance 2 7 pF 7.10.5.16.2.1 PRU_ICSSG PWM Timing Table 7-117. PRU_ICSSG PWM Switching Characteristics see Figure 7-100 NO. PARAMETER DESCRIPTION MIN MAX UNIT PRPWM1 tsk(PWM_A-PWM_B) Skew, PWM_A to PWM_B 5 ns PWM_A/B PRU_PWM_TIMING_01 PRPWM1 Figure 7-100. PRU_ICSSG PWM Timing www.ti.com AM6442, AM6441, AM6421, AM6412, AM6411 SPRSP56D – JANUARY 2021 – REVISED JULY 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 199 Product Folder Links: AM6442 AM6441 AM6421 AM6412 AM6411 |
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