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AM6441...ALV 数据表(PDF) 201 Page - Texas Instruments |
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AM6441...ALV 数据表(HTML) 201 Page - Texas Instruments |
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201 / 244 page  EDIO_DATA_OUT PRU_EDIO_DATA_OUT_TIMING_00 IEPIO4 Figure 7-102. PRU_ICSSG IEP Digital IOs Timing Requirements Table 7-121. PRU_ICSSG IEP Timing Requirements – LATCH_INx see Figure 7-103 NO. PARAMETER DESCRIPTION MIN MAX UNIT PRLA1 tw(EDC_LATCH_INxL) Pulse duration, EDC_LATCH_INx low 3P(1) + 2 ns PRLA2 tw(EDC_LATCH_INxH) Pulse duration, EDC_LATCH_INx high 3P(1) + 2 ns (1) P = PRU_ICSSG IEP clock source period in ns. EDC_LATCH_INx PRLA2 PRU_IEP_TIMING_02 PRLA1 Figure 7-103. PRU_ICSSG IEP LATCH_INx Timing Requirements 7.10.5.16.4 PRU_ICSSG Universal Asynchronous Receiver Transmitter (UART) Table 7-122. PRU_ICSSG UART Timing Conditions PARAMETER MIN MAX UNIT INPUT CONDITIONS SRI Input slew rate 0.01 0.33 V/ns OUTPUT CONDITIONS CL Output load capacitance 1 30 pF 7.10.5.16.4.1 PRU_ICSSG UART Timing Table 7-123. PRU_ICSSG UART Timing Requirements see Figure 7-104 NO. PARAMETER DESCRIPTION MIN MAX UNIT PRUR1H tw(RXH) Pulse duration, receive start, stop, data bit high 0.95U(1) 1.05U(1) ns PRUR1L tw(RXL) Pulse duration, receive start, stop, data bit low 0.95U(1) 1.05U(1) ns (1) U = UART baud time in ns = 1/programmed baud rate. Table 7-124. PRU_ICSSG UART Switching Characteristics see Figure 7-104 NO. PARAMETER DESCRIPTION MIN MAX UNIT f(baud) Programmed baud rate 12 Mbps PRUR3H tw(TXH) Pulse duration, transmit start, stop, data bit high U(1) - 2 U(1) + 2 ns PRUR3L tw(TXL) Pulse duration, transmit start, stop, data bit low U(1) - 2 U(1) + 2 ns (1) U = UART baud time in ns = 1/programmed baud rate. www.ti.com AM6442, AM6441, AM6421, AM6412, AM6411 SPRSP56D – JANUARY 2021 – REVISED JULY 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 201 Product Folder Links: AM6442 AM6441 AM6421 AM6412 AM6411 |
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