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AM6411...ALV 数据表(PDF) 117 Page - Texas Instruments |
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AM6411...ALV 数据表(HTML) 117 Page - Texas Instruments |
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117 / 244 page  7.10.3 System Timing For more details about features and additional description information on the subsystem multiplexing signals, see the corresponding subsections within Signal Descriptions and Detailed Description sections. Table 7-4. System Timing Conditions PARAMETER MIN MAX UNIT INPUT CONDITIONS SRI Input slew rate 0.5 V/ns OUTPUT CONDITIONS CL Output load capacitance 3 30 pF 7.10.3.1 Reset Timing Tables and figures provided in this section define timing requirements and switching characteristics for reset related signals. Table 7-5. MCU_PORz Timing Requirements see Figure 7-7 NO. PARAMETER MIN MAX UNIT RST1 th(SUPPLIES_VALID - MCU_PORz) Hold time, MCU_PORz active (low) at Power-up after supplies valid (using external crystal) 9500000 ns RST2 Hold time, MCU_PORz active (low) at Power-up after supplies valid and external clock stable (using external LVCMOS oscillator) 1200 ns RST3 tw(MCU_PORzL) Pulse Width minimum, MCU_PORz low after Power-up (without removal of Power or system reference clock MCU_OSC0_XI/XO) 1200 ns Figure 7-7. MCU_PORz Timing Requirements Table 7-6. MCU_RESETSTATz, and RESETSTATz Switching Characteristics see Figure 7-8 NO. PARAMETER MIN MAX UNIT RST4 td(MCU_PORzL-MCU_RESETSTATzL) Delay time, MCU_PORz active (low) to MCU_RESETSTATz active (low) 0 ns RST5 td(MCU_PORzH-MCU_RESETSTATzH) Delay time, MCU_PORz inactive (high) to MCU_RESETSTATz inactive (high) 6120*S(1) ns RST6 td(MCU_PORzL-RESETSTATzL) Delay time, MCU_PORz active (low) to RESETSTATz active (low) 0 ns www.ti.com AM6442, AM6441, AM6421, AM6412, AM6411 SPRSP56D – JANUARY 2021 – REVISED JULY 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 117 Product Folder Links: AM6442 AM6441 AM6421 AM6412 AM6411 |
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