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AM6411...ALV 数据表(PDF) 121 Page - Texas Instruments

部件名 AM6411...ALV
功能描述  AM64x Sitara™ Processors
PDF  244 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

AM6411...ALV 数据表(HTML) 121 Page - Texas Instruments

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Table 7-14. MCU_SAFETY_ERRORn Switching Characteristics (continued)
see Figure 7-13
NO.
PARAMETER
MIN
MAX UNIT
SFTY2 tw(MCU_SAFETY_ERRORn)
Pulse width minimum, MCU_SAFETY_ERRORn
active (PWM mode disabled)(5)
P*R(1) (2)
ns
SFTY3
td (ERROR_CONDITION-
MCU_SAFETY_ERRORnL)
Delay time, ERROR CONDITION to
MCU_SAFETY_ERRORn active(5)
50*P(1)
ns
(1)
P = ESM functional clock
(2)
R = Error Pin Counter Pre-Load Register count value
(3)
H = Error Pin PWM High Pre-Load Register count value
(4)
L = Error Pin PWM Low Pre-Load Register count value
(5)
When PWM mode is enabled, MCU_SAFETY_ERRORn stops toggling after RST22 and will maintain its value (either high or low) until
the error is cleared. When PWM mode is disabled, MCU_SAFETY_ERRORn is active low.
Figure 7-13. MCU_SAFETY_ERRORn Timing Requirements and Switching Characteristics
7.10.3.3 Clock Timing
Tables and figures provided in this section define timing requirements and switching characteristics for clock
signals.
Table 7-15. Clock Timing Requirements
see Figure 7-14
NO.
MIN
MAX UNIT
CLK1
tc(EXT_REFCLK1)
Cycle time minimum, EXT_REFCLK1
10
ns
CLK2
tw(EXT_REFCLK1H)
Pulse Duration minimum, EXT_REFCLK1 high
E*0.45(1)
E*0.55(1)
ns
CLK3
tw(EXT_REFCLK1L)
Pulse Duration minimum, EXT_REFCLK1 low
E*0.45(1)
E*0.55(1)
ns
CLK19 tc(MCU_EXT_REFCLK0)
Cycle time minimum, MCU_EXT_REFCLK0
10
ns
CLK20 tw(MCU_EXT_REFCLK0H)
Pulse Duration minimum, MCU_EXT_REFCLK0 high
F*0.45(2)
F*0.55(2)
ns
CLK21 tw(MCU_EXT_REFCLK0L)
Pulse Duration minimum, MCU_EXT_REFCLK0 low
F*0.45(2)
F*0.55(2)
ns
(1)
E = EXT_REFCLK1 cycle time
(2)
F = MCU_EXT_REFCLK0 cycle time
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AM6442, AM6441, AM6421, AM6412, AM6411
SPRSP56D – JANUARY 2021 – REVISED JULY 2022
Copyright © 2022 Texas Instruments Incorporated
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