DS12617 Rev 5

15/35

L99MOD53XP

Electrical specifications

34

Clock low time

400

ns

CSN setup time, CSN low before

rising edge of CLK

400

ns

CLK setup time, CLK high before

rising edge of CSN

400

ns

DI setup time

200

ns

DI hold time

200

ns

Rise time of input signal DI, CLK,

CSN

100

ns

Fall time of input signal DI, CLK,

CSN

100

ns

1. DI timing parameters tested in production by a passed / failed test:



Tj= -40°C / +25°C: SPI communication @ 2 MHz.



Tj= +125°C SPI communication @ 1.25 MHz.

Table 14. DI timing (continued)

Symbol

Test condition

Min.

Typ.

Max.

Unit

Table 15. DO

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

Output low level

0.2

0.4

V

Output high level

V

3-state leakage current

-10

10

µA

3-state input capacitance

10

15

pF

1. Value of input capacity is not measured in production test. Parameter guaranteed by design.

Table 16. DO timing

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

DO rise time

80

140

ns

DO fall time

50

100

ns

DO enable time

from 3-state to low level

100

250

ns

DO disable time

from low level to 3-state

380

450

ns

DO enable time

from 3-state to high level

pull-down load to GND

100

250

ns

DO disable time

from high level to 3-state

pull-down load to GND

380

450

ns

DO delay time

50

250

ns