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STELPD01 数据表(PDF) 8 Page - STMicroelectronics |
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STELPD01 数据表(HTML) 8 Page - STMicroelectronics |
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8 / 27 page ![]() 6 Functional description 6.1 Turn-on and soft start-up feature When the input voltage is applied and it reaches VUVLO (undervoltage lockout threshold) value, the EN/Fault pin goes up to the high state (if left floating) and the internal control circuitry is enabled to perform the output start-up ramp. See the figure below. Figure 5. Typical startup sequence for STELPD01 and STELPD01A The start-up procedure starts with an initial delay time of typically 165 µs, then the output voltage is supplied with a slope defined by the internal dV/dt circuitry. If no additional capacitor is connected to dV/dt pin, the ramp-up time (VOUT from 10% to 90%) is around 500 µs with VIN = 5 V. The inrush current profile can be controlled through a dedicated soft-start circuit. Connecting a capacitor between the CdV/dt pin and GND allows the modification of the output voltage ramp-up time. Given the desired time interval Δt during which the output voltage goes from 10% to 90% of VOUT, the capacitance to be added on the CdV/dt pin can be calculated using the following theoretical formula. Δtms =0.0024×VINV ×CdV/dtpF +0.1×VINV (1) STELPD01 Functional description DS13254 - Rev 1 page 8/27 |
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