KTB8331

December 2021

– Revision 04b

Page 21 of 25

Kinetic Confidential

INTMASK Mask Register

Register Address 0x06

Bit

Name

Access

Default

Reset

Description

7:5

RSVD

R/W

111

RSVD

4

POS_INTM

R/W

1

POS Interrupt Mask

0 = the interrupt is not masked

1 = the interrupt is masked

3

NEG_INTM

R/W

1

NEG Interrupt Mask

0 = the interrupt is not masked

1 = the interrupt is masked

2

RESET_INTM

R/W

1

RESET Interrupt Mask

0 = the interrupt is not masked

1 = the interrupt is masked

1

OT_INTM

R/W

1

OT Interrupt Mask

0 = the interrupt is not masked

1 = the interrupt is masked

0

nEN_INTM

R/W

1

nEN Interrupt Mask

0 = the interrupt is not masked

1 = the interrupt is masked

INTLATCH Interrupt Register

Register Address 0x07

Bit

Name

Access

Default

Reset

Description

7:5

RSVD

R/C

0

RSVD

4

POS_INT

R/C

0

POS Interrupt Latch

0 = VOUT has not slewed in positive direction due to DVS ramp-up

or soft-start since cleared

1 = VOUT was slewed in positive direction due to DVS ramp-up

or soft-start since cleared

3

NEG_INT

R/C

0

NEG Interrupt Latch

0 = VOUT has not slewed in negative direction due to DVS ramp-

down since cleared

1 = VOUT was slewed in negative direction due to DVS ramp-down

since cleared

2

RESET_INT

R/C

0

Software Reset Interrupt Latch

0 = software reset was not performed since this bit was cleared

1 = software reset was performed since this bit was cleared

The RESET_INT bit is set to 1 when a software reset is written to

the RESET bit (B2) in the CONTROL register. The RESET_STAT

bit is NOT reset by the software reset. Instead, it is cleared (reset

to 0) after the RESET_INT bit is read or whenever chip power is

removed (VIN<VPOR).

1

OT_INT

R/C

0

OT Interrupt Latch

0 = the die has not entered thermal shutdown since cleared

1 = the die was in thermal shutdown since cleared

0

nEN_INT

R/C

0

nEN (NOT Enabled = Disabled) Interrupt Latch

0 = the buck has not been disabled by hardware or software

since cleared

1 = the buck was disabled by hardware or software since cleared