LT8686SJVPBF datasheet(10/26 Pages) AD

10 / 26 page

LT8686S

Rev. 0

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PIN FUNCTIONS

SW1, SW2, SW3, SW4 (Pins 1, 32, 25, 24): Channel

Switch Pins. These pins are the outputs of each corre-

sponding channel’s internal power switches. When chan-

nels are operating independently, connect each SW pin to

the corresponding channel’s inductor and boost capacitor.

When combining channels, tie the combined channel’s

SW pins together with a low impedance connection. SW

traces on the PCB should be kept short for best efficiency

and EMI performance.

BST1, BST2, BST3, BST4 (Pins 2, 31, 26, 23): Channel

Boost Pins. These pins provide a drive voltage, higher

than the supply voltage, to the gate of each channel’s top

power switch.

PG1, PG2, PG3, PG4 (Pins 3, 30, 27, 22): Open-Drain

Power Good Output Pins. Each channel’s PG pin is pulled

to ground when the voltage at the corresponding FB pin

is not within ±7.5% of the internal 0.8V reference. PG

becomes high impedance once the voltage at the cor-

responding FB pin returns to within ±6% of the internal

reference. PG outputs for enabled channels are valid for

VIN1 voltages greater than 3V. PG outputs are pulled low

for channels which are not enabled. When channels are

combined, the dependent (slave) channel’s PG pin should

be open.

TRK/SS1, TRK/SS2, TRK/SS3, TRK/SS4 (Pins 4, 11,

14, 21): Output Tracking and Soft-Start Pins. These pins

allows user control of output voltage ramp rate during

start-up. A TRK/SSx voltage below 0.8V forces the chan-

nel to regulate the FBx pin to equal the TRK/SSx voltage.

When TRK/SSx is above 0.8V, the tracking function is

disabled and the internal reference resumes control of

the error amplifier. An internal 2μA pull-up current from

INTVCC on this pin allows a capacitor to program out-

put voltage slew rate. When channels are combined, the

dependent (slave) channel’s TRK/SS pin should be open.

EN/UVLO (Pin 5): Channel 1 Enable and Undervoltage

Lockout Pin. The LT8686S is in low power shutdown

when this pin is below 0.4V regardless of the state of the

remaining LT8686S enable pins. A voltage above 0.9V

(rising) enables LT8686 operation and channel 1. A pre-

cision threshold at 0.8V (falling) allows this pin to be used

as an input undervoltage lockout by connecting a resistor

divider between VIN1 and ground.

FB1 (Pin 6): Channel 1 Output Voltage Feedback Pin.

Channel 1 regulates this pin to a precision, internal,

0.8V reference voltage. Connect this pin to the appro-

priate resistor divider network to program the desired

output voltage.

EN2, EN3, EN4 (Pins 7, 18, 20): Channel Enable Pins.

Each LT8686S channel is active when the voltage on its

corresponding enable pin is above 0.9V (rising). A preci-

sion threshold at 0.81 (falling) allows each enable pin to

act as a programmable undervoltage lockout by connect-

ing a resistor divider between the corresponding input

supply and ground. When channels are combined, the

dependent (slave) channel’s EN pin should be connected

to the enable pin of the controlling (master) channel.

FB2 (Pin 8): Channel 2 Output Voltage Feedback Pin.

Channel 2 regulates this pin to a precision, internal, 0.8V

reference voltage. Connect this pin to the appropriate

resistor divider network to program the desired output

voltage. When this pin is tied to INTVCC, channel 2 is com-

bined with channel 1 to create a single output channel with

increased output current capability. See the Applications

Information section for more detail.

VIN1 (Pin 9): Channel 1 and Internal INTVCC Regulator

Power Supply Input. This pin should be closely decou-

pled to ground with a low ESR capacitor of value 2.2μF

or greater.

VIN2 (Pin 10): Channel 2 Power Supply Input. This

pin should be closely decoupled to ground with a low

ESR capacitor of value 2.2μF or greater. This pin must

be shorted to VIN1 when channel 2 is combined with

channel 1.

SYNC/MODE (Pin 12): Mode Selection and External

Synchronization Input Pin. This pin places all active

LT8686S channels into high efficiency Burst Mode®

operation when tied to ground. Tie this pin to ground

with a 26k (5% tolerance or better) resistor to enable

high efficiency Burst Mode with spread spectrum modu-

lation. Float this pin to enable pulse-skipping mode. Tie

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