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LT8686SJVPBF 数据表(PDF) 17 Page - Analog Devices

部件名 LT8686SJVPBF
功能描述  42V Quad, Gangable, Synchronous, Monolithic Step-Down Regulator
PDF  26 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

LT8686SJVPBF 数据表(HTML) 17 Page - Analog Devices

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LT8686S
17
Rev. 0
For more information www.analog.com
The value of R2 is best selected first as this establishes
how much current is in the resistor divider network cal-
culated as based on I = 0.8V/R2. The current should be
chosen such that it is not influenced by anticipated leak-
age or noise. R1 can then be calculated with Equation 4.
R1
=R2•
VOUTx
0.8
–1
⎝⎜
⎠⎟
(4)
CFF can optionally be used to improve the transient
response and stability of the internally compensated feed-
back loops. The values shown in the Typical Applications
section will provide a good starting point for selecting CFF,
though careful evaluation of regulator stability should be
made to ensure adequate design margin.
For the LT8686S’s 42V input capable channels, the max-
imum allowed programmed output voltage is 14V.
When the 8V input capable channels are combined (chan-
nels 3 and 4), the maximum allowed programmed output
voltage is 4V.
OPERATING FREQUENCY AND INPUT VOLTAGE RANGE
Each buck regulator’s, minimum on-time, tON(MIN), and
minimum off-time, tOFF(MIN), impose limitations on the
achievable duty cycle range and operating frequency.
For buck regulators, the duty cycle is calculated with
Equation 5.
D=
VOUTx
VINx
(5)
Further, the minimum duty cycle achievable at a given
operating frequency is calculated with Equation 6.
DMIN = tON(MIN) • fSW
(6)
where fSW is the programmed operating frequency.
The maximum duty cycle achievable at a given operating
frequency is calculated with Equation 7.
DMAX =1–(tOFF(MIN) • fSW)
(7)
Combining Equation 6 and Equation 7, the minimum
VIN voltage while regulating at full frequency is given by
Equation 8.
VINx(MIN) =
VOUTx
1–(tOFF(MIN) • fSW)
(8)
Below VVINx(MIN), the buck regulator will enter dropout,
and the top switch will stay on longer than a clock cycle.
While operating in dropout, the buck regulator’s output
voltage will be below the programmed value.
The maximum VIN voltage while regulating at full fre-
quency is given by Equation 9.
VINx(MAX) =
VOUTx
tON(MIN) • fSW
(9)
If the VVINX(MAX) given above is exceeded during regu-
lation, the buck regulator will skip switch-on cycles to
maintain regulation.
INDUCTOR SELECTION
For a given input and output voltage, the inductor value
and operating frequency determine the inductor ripple
current. More specifically, the inductor ripple current
decreases with higher inductor value or higher operating
frequency according to Equation 10.
IL =
VOUT
fSW •L
• 1–
VOUT
VIN
(10)
where ΔIL = inductor ripple current (A), fSW = switching
frequency (Hz), L = inductor value (H), and VIN is the nom-
inal input voltage rating. A trade-off between component
size, efficiency and operating frequency can be seen from
Equation 10. Accepting larger values of ΔIL allows the use
of lower value inductors but results in greater core loss
in the inductor, greater ESR loss in the output capacitor,
and larger output ripple.
APPLICATIONS INFORMATION



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