ST7294 datasheet(14/69 Pages) STMICROELECTRONICS

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ST7294

3.4 INTERRUPTS

3.4.1 Introduction

The ST7294 may be interrupted by one of four dif-

ferent methods: the three maskable hardware in-

terrupts (INT, PORT C or TIMER) and the non-

maskable software interrupt (TRAP). The Interrupt

processing flowchart is shown in Figure 11. The

maskable interrupts must be enabled in order to

be serviced. However, disabled interrupts can be

latched and processed when they are enabled.

When an interrupt has to be serviced, the PC, X, A

and CC registers are saved into the stack and the

interrupt mask (I bit of the Condition Code Regis-

ter) is set to prevent additional interrupts. The Y

der is shown on Figure 5.

The PC is then loaded with the interrupt vector of

the interrupt to service and the interrupt service

routine runs (refer to Table 6 for vector address-

es). It should finish by the IRET instruction which

causes the contents of the registers to be recov-

ered from the stack and normal processing to

resume. Note that the I bit is then cleared if and

only if the corresponding bit stored in the stack is

zero.

Though many interrupts can be simultaneously

pending, a priority order is defined. The RESET

pin has the highest priority. Then, if the I bit is low,

the decreasing priority order is TRAP, INT, timer

input capture, timer output compare, timer over-

flow and PORT C. If the I bit is set, TRAP is the

only enabled interrupt.

Interrupts allow the processor to leave low power

modes. Refer to LOW POWER MODES for further

information.

3.4.2 Software Interrupt

The software interrupt is the TRAP executable in-

struction. The interrupt is recognized when the

TRAP instruction is executed, regardless to the I

bit state. When the interrupt is recognized, it is

serviced according to the flowchart on Figure 10.

3.4.3 External Interrupt

The external interrupt is generated through the

INT pin. The interrupt is enabled if the I bit of the

CCR is cleared.

The INTN and INTP bits of the Miscellaneous

gering mode among the 4 available ones. Refer to

Table 5 for the triggering mode coding.

In order to avoid conflicts and spurious interrupts,

the external interrupt options can only be changed

when the I bit is set. Any attempt to change the op-

tions while I is reset fails. When the options are

changed any pending interrupt is lost.

When

an enabled

interrupt

occurs,

normal

processing is suspended at the end of the current

instruction execution. It is then processed accord-

ing to the flowchart on Figure 11.

If the interrupt is disabled (I high), the triggering

edge of the INT line is internally latched and the in-

terrupt remains pending to be processed as soon

as the interrupt is enabled (the low level sensitive

interrupt is not latched and can therefore not re-

main pending). This internal latch is cleared in the

first part of the service routine. Therefore, one,

and one only, external interrupt can be latched

and serviced as soon as enabled.

Figure 12 shows the mode timing diagram for the

interrupt line. Two methods are described. The

first method shows single pulses on the interrupt

line spaced far enough apart to be serviced. The

minimum time between pulses is a function of the

number of cycles required to execute the interrupt

service routine plus 21 cycles. Once a pulse oc-

curs, the next pulse should not occur until the

MCU software has exited the routine (an IRET in-

struction occurs).

The second configuration shows several interrupt

lines “wire-ORed” to form the interrupts at the

processor. Thus, if after servicing one interrupt the

interrupt line remains low, then the next interrupt is

recognized.

Application Note (INT pin operation): The INT pin

is used as an external interrupt input signal, and

also to select a non-user autotest mode reserved

exclusively for internal use by SGS-THOMSON

Microelectronics. There is no pull-up resistor con-

nected internally to the INT pin. Thus, in order to

avoid unexpected entry in non-user mode, the INT

pin must be tied to V

DD if not used, or connected to

DD through a diode if used as an input. See Cau-

tion message in section Section 1.2 PIN DE-

SCRIPTION.

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