数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

LARA-R6401D 数据表(PDF) 28 Page - u-blox AG

部件名 LARA-R6401D
功能描述  Single or multi-mode LTE Cat 1 modules with Secure Cloud
PDF  41 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  U-BLOX [u-blox AG]
网页  https://www.u-blox.com/
标志 U-BLOX - u-blox AG

LARA-R6401D 数据表(HTML) 28 Page - u-blox AG

Back Button LARA-R6401D Datasheet HTML 24Page - u-blox AG LARA-R6401D Datasheet HTML 25Page - u-blox AG LARA-R6401D Datasheet HTML 26Page - u-blox AG LARA-R6401D Datasheet HTML 27Page - u-blox AG LARA-R6401D Datasheet HTML 28Page - u-blox AG LARA-R6401D Datasheet HTML 29Page - u-blox AG LARA-R6401D Datasheet HTML 30Page - u-blox AG LARA-R6401D Datasheet HTML 31Page - u-blox AG LARA-R6401D Datasheet HTML 32Page - u-blox AG Next Button
Zoom Inzoom in Zoom Outzoom out
 28 / 41 page
background image
LARA-R6 series - Data sheet
UBX-21004391 - R09
Electrical specifications
Page 28 of 41
C1-Public
4.2.10 RESET_N pin
Parameter
Min.
Typical Max.
Unit
Remarks
Internal supply for
RESET_N Input Signal
1.8
V
Low-level input
-0.30
0.63
V
Pull-up resistance
37
k
Internal active pull-up
Input leakage current
-0.20
0.20
µ
A
RESET_N low time
0.05
6
s
Low time to trigger module reset (reboot)
10
s
Low time to trigger module abrupt emergency switch off
Table 23: RESET_N pin characteristics
4.2.11 SIM pins
The SIM pins are a dedicated interface to the external SIM card/chip. The electrical characteristics
fulfill the regulatory specification requirements. The values in Table 24 are for information only.
Parameter
Min.
Typ.
Max.
Unit
Remarks
Low-level input
-0.30
0.2*VSIM
V
High-level input
0.7*VSIM
VSIM+0.3
V
Low-level output
0
0.4
V
Max value at IOL = +2.0 mA
High-level output
0.8*VSIM
VSIM
V
Max value at IOL = +2.0 mA
Internal pull-up resistor on SIM_IO
4.7
k
Internal pull-up to VSIM supply
Input leakage current
-2
2
µ
A
VIN =0 V or VIN =VSIM
Clock frequency on SIM_CLK
4.8
MHz
Table 24: SIM pins characteristics
4.2.12 USB pins
USB data lines (USB_D+ / USB_D–) are compliant with the USB 2.0 high-speed specification. See the
Universal Serial Bus specification revision 2.0 [14] for detailed electrical characteristics. The values in
Table 25 related to USB 2.0 high-speed physical layer specifications are for information only.
Parameter
Min. Typical Max. Unit Remarks
VUSB_DET pin, High-level input
1.50 5.00
5.25 V
AT+UUSBDET=0 (factory-programmed setting)
4.40 5.00
5.25 V
AT+UUSBDET=1
High-speed squelch detection threshold
(input differential signal amplitude)
100
150 mV
High speed disconnect detection threshold
(input differential signal amplitude)
525
625 mV
High-speed data signaling input
common mode voltage range
–50
500 mV
High-speed idle output level
–10
10
mV
High-speed data signaling output high level 360
440 mV
High-speed data signaling output low level –10
10
mV
Chirp J level (output differential voltage)
700
1100 mV
Chirp K level (output differential voltage)
–900
–500 mV
Table 25: USB pins characteristics



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com