A Product Line of

Diodes Incorporated

PI2DPX2020

8

www.diodes.com

July 2022

Diodes Incorporated

PI2DPX2020

Document Number DS43506 Rev 5-2

Symbol

Parameter

Resistance

Units

Rin-ch_pd

Output res at channel PD/safe mode (EN=1)

78k to VbiasTx

Ω

Rout-Active

Output res at active mode condition

50 to VDD

Ω

Rout-Slumber

Output res in slumber mode 2)

6k to VbiasTx1

Ω

Rout-DeepSlumber

Output res in Deep slumber mode 2)

6k to VbiasTx2

Ω

Rout-RxDet

Output res in Unplug mode 2)

6k to VbiasTx2

Ω

Rout-DP-standby

Output res in DP standby mode

78k to VbiasTx

Ω

Rout-DP-active

Output res in DP active mode

50 to VDD

Ω

Rout-DP-D3

Output res in DP D3 mode

78k to VbiasTx

Ω

Notes:

1) The value of Rin will be updated only after the receiver evaluation. Thus, the value can be 50Ω or 78kΩ.

2) The value of Rout will be updated only after the receiver evaluation. Thus, the value can be 50Ω or 6kΩ.

USB Mode

In the low power mode, the signal detector will still be monitoring the input channel. If a channel is in low power mode and the input

signal is detected, the corresponding channel will wake-up immediately. If a channel is in low power mode and the signal detector is

idle longer than 6ms, the receiver detection loop will be active again. If a load is not detected, then the Channel will move to Device

Unplug Mode and monitor the load continuously. If a load is detected, it will return to Low Power Mode, and the receiver detection will

be active again in 6ms.

DisplayPort Mode

By default, all channels will go to active mode if HPD bit = 1. The ON/OFF of each DP channel is controlled by the Aux lane count.

ML_TX_x_n

ML_TX_x_p

Source

Connector

Sink

Connector

Sink

Connector

Tx

Rx

50

50

Vbias_Tx

50

50

Vbias_Rx

Upstream device

Downstream device

ML_TX_x_n

ML_TX_x_p

ML_RX_x_n

ML_RX_x_p

ML_RX_x_n

ML_RX_x_p

Source

Connector

Tx

Rx

50

50

Vbias_Tx

50

50

Vbias_Rx

100k-1M

100k-1M

Figure 1. DisplayPort Main Link Connection Diagram