FT902Q-R datasheet(32/67 Pages) BRIDGETEK

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FT900

/1/2/3 Revision C Embedded Microcontroller Datasheet

Version 1.0

Document No. BRT_000172 Clearance No.: BRT#087

4.21

Analog to Digital Converter (ADC)

The FT900/1/2/3 series has a low-power, high-speed, successive approximation Analog-to-Digital

Converter (ADC) that supports a configurable 8-bit/10-bit resolution and superior maximum sampling

frequencies of up to approximately 960 Kilo Samples Per-second (kS/s). This ADC accepts analog inputs

ranging from the ground supplies to the power supplies. This ADC can be used in various low-power and

medium-resolution applications.

4.21.1

Features



Configurable 8-bit/10-bit successive approximation ADC.



Supports 7 channel input.



Individual channels can be selected for conversion.



Power-down mode support.



Max conversion rate up to approximately 960 kS/s.



Measurement range 0 to VCC3V3A, by default the range voltage is 10% off of VCC3V3A. See

Table 5-7.



INL: +/-2LSB (max)..



DNL: +/-1LSB (max).

4.22

Digital to Analog Converter (DAC)

The FT900/1/2/3 series has two 10-bit, 1 Mega Samples Per-second (MS/S) Digital-Analog converter

(DAC). It includes digital logic for registering the DAC value and a unity-gain buffer capable of driving off-

chip. The module can also be switched to a power-down state where it consumes a minimum amount of

current. The maximum output value of the DAC is decided by the reference voltage at pin DAC_REFP.

4.22.1

Features



Two 10-bit DACs (0/1).



10-bit R-2R DAC ladder structure.



Buffered output.



Power-down mode support.



Programmable conversion rate, the maximum rate is 1MHz.



Selectable output drive.



INL: +/-2LSB (max).



DNL: +/-1LSB (max).

4.23

General Purpose Input/Output

The FT900/1/2/3 series provides up to 65 configurable Input/Output pins controlled by GPIO registers. All

pins have multiple functions with special peripheral connection. Separate registers allow setting or

clearing any number of outputs simultaneously. All GPIO pins default to inputs with pull-down resistors

enabled on reset except GPIO0/1/2 inputs that have pull-up resistors enabled.

All GPIOs can function as an interrupt. The polarity can be either positive edge or negative edge if its

interrupt capability is enabled. In this case, the GPIO pin must be configured as a GPIO input.

4.23.1

Features



All GPIO default to inputs after reset (except GPIO0/1/2).



Multi-function selection on GPIO pins.



Pull-up/Pull-down resistor configuration and open-drain configuration can be programmed

through the pin connect block for each GPIO pin.



Direction control of individual bits.



Supports GPIO input Schmitt trigger to help remove noise.



Supports GPIO interrupt, where each enabled GPIO interrupt can be used to wake-up the system

from power-down mode.

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